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Magnus Lilja8449f282009-07-01 01:07:55 +02001/*
2 *
3 * (C) Copyright 2009 Magnus Lilja <lilja.magnus@gmail.com>
4 *
5 * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
6 *
7 * See file CREDITS for list of people who contributed to this
8 * project.
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 */
25
26
27#include <common.h>
Ben Warren736fead2009-07-20 22:01:11 -070028#include <netdev.h>
Stefano Babic86271112011-03-14 15:43:56 +010029#include <asm/arch/clock.h>
30#include <asm/arch/imx-regs.h>
Magnus Lilja8449f282009-07-01 01:07:55 +020031
32DECLARE_GLOBAL_DATA_PTR;
33
34int dram_init(void)
35{
Fabio Estevamed3df722011-02-09 01:17:55 +000036 /* dram_init must store complete ramsize in gd->ram_size */
37 gd->ram_size = get_ram_size((volatile void *)CONFIG_SYS_SDRAM_BASE,
38 PHYS_SDRAM_1_SIZE);
39 return 0;
40}
41
42void dram_init_banksize(void)
43{
Magnus Lilja8449f282009-07-01 01:07:55 +020044 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
45 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
Magnus Lilja8449f282009-07-01 01:07:55 +020046}
47
Fabio Estevam9b6442f2011-02-09 01:17:56 +000048int board_early_init_f(void)
Magnus Lilja8449f282009-07-01 01:07:55 +020049{
50 /* CS5: CPLD incl. network controller */
51 __REG(CSCR_U(5)) = 0x0000d843;
52 __REG(CSCR_L(5)) = 0x22252521;
53 __REG(CSCR_A(5)) = 0x22220a00;
54
55 /* Setup UART1 and SPI2 pins */
56 mx31_uart1_hw_init();
57 mx31_spi2_hw_init();
58
Fabio Estevam9b6442f2011-02-09 01:17:56 +000059 return 0;
60}
61
62int board_init(void)
63{
Magnus Lilja8449f282009-07-01 01:07:55 +020064 gd->bd->bi_arch_number = MACH_TYPE_MX31_3DS; /* board id for linux */
65 /* adress of boot parameters */
66 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
67
68 return 0;
69}
70
71int checkboard(void)
72{
73 printf("Board: i.MX31 MAX PDK (3DS)\n");
74 return 0;
75}
Ben Warren736fead2009-07-20 22:01:11 -070076
77int board_eth_init(bd_t *bis)
78{
79 int rc = 0;
80#ifdef CONFIG_SMC911X
81 rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
82#endif
83 return rc;
84}