Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Mateusz Kulikowski | 1dcdd86 | 2013-12-02 23:30:58 +0100 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2007-2013 |
| 4 | * Stelian Pop <stelian.pop@leadtechdesign.com> |
| 5 | * Lead Tech Design <www.leadtechdesign.com> |
| 6 | * Thomas Petazzoni, Free Electrons, <thomas.petazzoni@free-electrons.com> |
| 7 | * Mateusz Kulikowski <mateusz.kulikowski@gmail.com> |
| 8 | * |
| 9 | * Settings for Calao USB-A9263 board |
| 10 | * |
| 11 | * U-Boot image has to be less than 200704 bytes, otherwise at91bootstrap |
| 12 | * installed on board will not be able to load it properly. |
Mateusz Kulikowski | 1dcdd86 | 2013-12-02 23:30:58 +0100 | [diff] [blame] | 13 | */ |
| 14 | |
| 15 | #ifndef __CONFIG_H |
| 16 | #define __CONFIG_H |
| 17 | #include <asm/hardware.h> |
| 18 | |
| 19 | /* ARM asynchronous clock */ |
Tom Rini | 65cc0e2 | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 20 | #define CFG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ |
| 21 | #define CFG_SYS_AT91_SLOW_CLOCK 32768 |
Mateusz Kulikowski | 1dcdd86 | 2013-12-02 23:30:58 +0100 | [diff] [blame] | 22 | |
Mateusz Kulikowski | 1dcdd86 | 2013-12-02 23:30:58 +0100 | [diff] [blame] | 23 | /* |
| 24 | * Hardware drivers |
| 25 | */ |
Mateusz Kulikowski | 1dcdd86 | 2013-12-02 23:30:58 +0100 | [diff] [blame] | 26 | |
Mateusz Kulikowski | 1dcdd86 | 2013-12-02 23:30:58 +0100 | [diff] [blame] | 27 | /* SDRAM */ |
Tom Rini | aa6e94d | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 28 | #define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS1 |
| 29 | #define CFG_SYS_SDRAM_SIZE 0x04000000 |
Mateusz Kulikowski | 1dcdd86 | 2013-12-02 23:30:58 +0100 | [diff] [blame] | 30 | |
Tom Rini | 65cc0e2 | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 31 | #define CFG_SYS_INIT_RAM_SIZE (16 * 1024) |
| 32 | #define CFG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM1 |
Mateusz Kulikowski | 1dcdd86 | 2013-12-02 23:30:58 +0100 | [diff] [blame] | 33 | |
Mateusz Kulikowski | 1dcdd86 | 2013-12-02 23:30:58 +0100 | [diff] [blame] | 34 | /* NAND flash */ |
| 35 | #ifdef CONFIG_CMD_NAND |
Tom Rini | 4e59094 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 36 | #define CFG_SYS_NAND_BASE ATMEL_BASE_CS3 |
Mateusz Kulikowski | 1dcdd86 | 2013-12-02 23:30:58 +0100 | [diff] [blame] | 37 | /* our ALE is AD21 */ |
Tom Rini | 4e59094 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 38 | #define CFG_SYS_NAND_MASK_ALE (1 << 21) |
Mateusz Kulikowski | 1dcdd86 | 2013-12-02 23:30:58 +0100 | [diff] [blame] | 39 | /* our CLE is AD22 */ |
Tom Rini | 4e59094 | 2022-11-12 17:36:51 -0500 | [diff] [blame] | 40 | #define CFG_SYS_NAND_MASK_CLE (1 << 22) |
| 41 | #define CFG_SYS_NAND_ENABLE_PIN GPIO_PIN_PD(15) |
| 42 | #define CFG_SYS_NAND_READY_PIN GPIO_PIN_PA(22) |
Mateusz Kulikowski | 1dcdd86 | 2013-12-02 23:30:58 +0100 | [diff] [blame] | 43 | #endif |
| 44 | |
Wenyou.Yang@microchip.com | fdc7718 | 2017-07-21 17:07:46 +0800 | [diff] [blame] | 45 | /* bootstrap + u-boot + env + linux in dataflash on CS0 */ |
Tom Rini | 0613c36 | 2022-12-04 10:03:50 -0500 | [diff] [blame] | 46 | #define CFG_EXTRA_ENV_SETTINGS \ |
Mateusz Kulikowski | 1dcdd86 | 2013-12-02 23:30:58 +0100 | [diff] [blame] | 47 | |
Mateusz Kulikowski | 1dcdd86 | 2013-12-02 23:30:58 +0100 | [diff] [blame] | 48 | #endif |