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Stelian Popd99a8ff2008-05-08 20:52:22 +02001/*
2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
5 *
6 * Configuation settings for the AT91SAM9261EK board.
7 *
8 * See file CREDITS for list of people who contributed to this
9 * project.
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * MA 02111-1307 USA
25 */
26
27#ifndef __CONFIG_H
28#define __CONFIG_H
29
Jens Scharsig425de622010-02-03 22:45:42 +010030#define CONFIG_AT91_LEGACY
31
Stelian Popd99a8ff2008-05-08 20:52:22 +020032/* ARM asynchronous clock */
Stelian Popad229a42008-11-07 13:55:14 +010033#define AT91_MAIN_CLOCK 18432000 /* 18.432 MHz crystal */
Jean-Christophe PLAGNIOL-VILLARD6ebff362009-04-16 21:30:48 +020034#define CONFIG_SYS_HZ 1000
Stelian Popd99a8ff2008-05-08 20:52:22 +020035
Stelian Popd99a8ff2008-05-08 20:52:22 +020036#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
Sedji Gaouaou5ccc2d92009-06-25 17:04:15 +020037#ifdef CONFIG_AT91SAM9G10EK
38#define CONFIG_AT91SAM9G10 1 /* It's an Atmel AT91SAM9G10 SoC*/
39#else
Stelian Popd99a8ff2008-05-08 20:52:22 +020040#define CONFIG_AT91SAM9261 1 /* It's an Atmel AT91SAM9261 SoC*/
Sedji Gaouaou5ccc2d92009-06-25 17:04:15 +020041#endif
Jean-Christophe PLAGNIOL-VILLARDdc39ae92009-04-16 21:30:44 +020042#define CONFIG_ARCH_CPU_INIT
Stelian Popd99a8ff2008-05-08 20:52:22 +020043#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
44
45#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
46#define CONFIG_SETUP_MEMORY_TAGS 1
47#define CONFIG_INITRD_TAG 1
48
49#define CONFIG_SKIP_LOWLEVEL_INIT
50#define CONFIG_SKIP_RELOCATE_UBOOT
51
52/*
53 * Hardware drivers
54 */
55#define CONFIG_ATMEL_USART 1
56#undef CONFIG_USART0
57#undef CONFIG_USART1
58#undef CONFIG_USART2
59#define CONFIG_USART3 1 /* USART 3 is DBGU */
60
Stelian Pop820f2a92008-05-08 14:52:30 +020061/* LCD */
62#define CONFIG_LCD 1
63#define LCD_BPP LCD_COLOR8
64#define CONFIG_LCD_LOGO 1
65#undef LCD_TEST_PATTERN
66#define CONFIG_LCD_INFO 1
67#define CONFIG_LCD_INFO_BELOW_LOGO 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020068#define CONFIG_SYS_WHITE_ON_BLACK 1
Stelian Pop820f2a92008-05-08 14:52:30 +020069#define CONFIG_ATMEL_LCD 1
Sedji Gaouaou5ccc2d92009-06-25 17:04:15 +020070#ifdef CONFIG_AT91SAM9261EK
Stelian Pop820f2a92008-05-08 14:52:30 +020071#define CONFIG_ATMEL_LCD_BGR555 1
Sedji Gaouaou5ccc2d92009-06-25 17:04:15 +020072#else
73#define CONFIG_AT91SAM9G10_LCD_BASE 0x23E00000 /* LCD is no more in SRAM */
74#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020075#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
Stelian Pop820f2a92008-05-08 14:52:30 +020076
Jean-Christophe PLAGNIOL-VILLARDa484b002009-03-21 21:08:00 +010077/* LED */
78#define CONFIG_AT91_LED
79#define CONFIG_RED_LED AT91_PIN_PA23 /* this is the power led */
80#define CONFIG_GREEN_LED AT91_PIN_PA13 /* this is the user1 led */
81#define CONFIG_YELLOW_LED AT91_PIN_PA14 /* this is the user2 led */
82
Stelian Popd99a8ff2008-05-08 20:52:22 +020083#define CONFIG_BOOTDELAY 3
84
Stelian Popd99a8ff2008-05-08 20:52:22 +020085/*
86 * BOOTP options
87 */
88#define CONFIG_BOOTP_BOOTFILESIZE 1
89#define CONFIG_BOOTP_BOOTPATH 1
90#define CONFIG_BOOTP_GATEWAY 1
91#define CONFIG_BOOTP_HOSTNAME 1
92
93/*
94 * Command line configuration.
95 */
96#include <config_cmd_default.h>
97#undef CONFIG_CMD_BDI
Stelian Popd99a8ff2008-05-08 20:52:22 +020098#undef CONFIG_CMD_FPGA
Wolfgang Denk74de7ae2009-04-01 23:34:12 +020099#undef CONFIG_CMD_IMI
Stelian Popd99a8ff2008-05-08 20:52:22 +0200100#undef CONFIG_CMD_IMLS
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200101#undef CONFIG_CMD_LOADS
102#undef CONFIG_CMD_SOURCE
Stelian Popd99a8ff2008-05-08 20:52:22 +0200103
104#define CONFIG_CMD_PING 1
105#define CONFIG_CMD_DHCP 1
106#define CONFIG_CMD_NAND 1
107#define CONFIG_CMD_USB 1
108
109/* SDRAM */
110#define CONFIG_NR_DRAM_BANKS 1
111#define PHYS_SDRAM 0x20000000
112#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */
113
114/* DataFlash */
Jean-Christophe PLAGNIOL-VILLARD4758ebd2009-03-27 23:26:44 +0100115#define CONFIG_ATMEL_DATAFLASH_SPI
Stelian Popd99a8ff2008-05-08 20:52:22 +0200116#define CONFIG_HAS_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200117#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ)
118#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2
119#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */
120#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000 /* CS3 */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200121#define AT91_SPI_CLK 15000000
122#define DATAFLASH_TCSS (0x1a << 16)
123#define DATAFLASH_TCHS (0x1 << 24)
124
125/* NAND flash */
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100126#ifdef CONFIG_CMD_NAND
127#define CONFIG_NAND_ATMEL
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200128#define CONFIG_SYS_MAX_NAND_DEVICE 1
129#define CONFIG_SYS_NAND_BASE 0x40000000
130#define CONFIG_SYS_NAND_DBW_8 1
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100131/* our ALE is AD22 */
132#define CONFIG_SYS_NAND_MASK_ALE (1 << 22)
133/* our CLE is AD21 */
134#define CONFIG_SYS_NAND_MASK_CLE (1 << 21)
135#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
136#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC15
Wolfgang Denk2eb99ca2009-07-18 21:52:24 +0200137
Jean-Christophe PLAGNIOL-VILLARD74c076d2009-03-22 10:22:34 +0100138#endif
Stelian Popd99a8ff2008-05-08 20:52:22 +0200139
140/* NOR flash - no real flash on this board */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200141#define CONFIG_SYS_NO_FLASH 1
Stelian Popd99a8ff2008-05-08 20:52:22 +0200142
143/* Ethernet */
Remy Bohmer60f61e62009-05-02 21:49:18 +0200144#define CONFIG_NET_MULTI 1
Stelian Popd99a8ff2008-05-08 20:52:22 +0200145#define CONFIG_DRIVER_DM9000 1
146#define CONFIG_DM9000_BASE 0x30000000
147#define DM9000_IO CONFIG_DM9000_BASE
148#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
149#define CONFIG_DM9000_USE_16BIT 1
Remy Bohmere5a3bc22009-05-03 12:11:40 +0200150#define CONFIG_DM9000_NO_SROM 1
Stelian Popd99a8ff2008-05-08 20:52:22 +0200151#define CONFIG_NET_RETRY_COUNT 20
152#define CONFIG_RESET_PHY_R 1
153
154/* USB */
Jean-Christophe PLAGNIOL-VILLARD2b7178a2009-03-27 23:26:44 +0100155#define CONFIG_USB_ATMEL
Stelian Popd99a8ff2008-05-08 20:52:22 +0200156#define CONFIG_USB_OHCI_NEW 1
Stelian Popd99a8ff2008-05-08 20:52:22 +0200157#define CONFIG_DOS_PARTITION 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200158#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
159#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9261_UHP_BASE */
Sedji Gaouaou5ccc2d92009-06-25 17:04:15 +0200160#ifdef CONFIG_AT91SAM9G10EK
161#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g10"
162#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200163#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
Sedji Gaouaou5ccc2d92009-06-25 17:04:15 +0200164#endif
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200165#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
Stelian Popd99a8ff2008-05-08 20:52:22 +0200166#define CONFIG_USB_STORAGE 1
Stelian Pop3e0cda02008-11-09 00:14:46 +0100167#define CONFIG_CMD_FAT 1
Stelian Popd99a8ff2008-05-08 20:52:22 +0200168
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200169#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200170
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200171#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
172#define CONFIG_SYS_MEMTEST_END 0x23e00000
Stelian Popd99a8ff2008-05-08 20:52:22 +0200173
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200174#ifdef CONFIG_SYS_USE_DATAFLASH_CS0
Stelian Popd99a8ff2008-05-08 20:52:22 +0200175
176/* bootstrap + u-boot + env + linux in dataflash on CS0 */
Jean-Christophe PLAGNIOL-VILLARD057c8492008-09-10 22:47:58 +0200177#define CONFIG_ENV_IS_IN_DATAFLASH 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200178#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
Nicolas Ferre89a7a872008-12-06 13:11:14 +0100179#define CONFIG_ENV_OFFSET 0x4200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200180#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200181#define CONFIG_ENV_SIZE 0x4200
Stelian Popd99a8ff2008-05-08 20:52:22 +0200182#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
183#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
184 "root=/dev/mtdblock0 " \
Albin Tonnerre918319c2009-07-22 18:30:03 +0200185 "mtdparts=atmel_nand:-(root) " \
Stelian Popd99a8ff2008-05-08 20:52:22 +0200186 "rw rootfstype=jffs2"
187
Nicolas Ferre89a7a872008-12-06 13:11:14 +0100188#elif CONFIG_SYS_USE_DATAFLASH_CS3
189
190/* bootstrap + u-boot + env + linux in dataflash on CS3 */
191#define CONFIG_ENV_IS_IN_DATAFLASH 1
192#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
193#define CONFIG_ENV_OFFSET 0x4200
194#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
195#define CONFIG_ENV_SIZE 0x4200
196#define CONFIG_BOOTCOMMAND "cp.b 0xD0042000 0x22000000 0x210000; bootm"
197#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
198 "root=/dev/mtdblock0 " \
Albin Tonnerre918319c2009-07-22 18:30:03 +0200199 "mtdparts=atmel_nand:-(root) " \
Nicolas Ferre89a7a872008-12-06 13:11:14 +0100200 "rw rootfstype=jffs2"
201
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200202#else /* CONFIG_SYS_USE_NANDFLASH */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200203
204/* bootstrap + u-boot + env + linux in nandflash */
Jean-Christophe PLAGNIOL-VILLARD51bfee12008-09-10 22:47:58 +0200205#define CONFIG_ENV_IS_IN_NAND 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200206#define CONFIG_ENV_OFFSET 0x60000
207#define CONFIG_ENV_OFFSET_REDUND 0x80000
208#define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200209#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
210#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
211 "root=/dev/mtdblock5 " \
Albin Tonnerre918319c2009-07-22 18:30:03 +0200212 "mtdparts=atmel_nand:128k(bootstrap)ro," \
Stelian Popd99a8ff2008-05-08 20:52:22 +0200213 "256k(uboot)ro,128k(env1)ro," \
214 "128k(env2)ro,2M(linux),-(root) " \
215 "rw rootfstype=jffs2"
216
217#endif
218
219#define CONFIG_BAUDRATE 115200
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200220#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
Stelian Popd99a8ff2008-05-08 20:52:22 +0200221
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200222#define CONFIG_SYS_PROMPT "U-Boot> "
223#define CONFIG_SYS_CBSIZE 256
224#define CONFIG_SYS_MAXARGS 16
225#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
226#define CONFIG_SYS_LONGHELP 1
Stelian Popd99a8ff2008-05-08 20:52:22 +0200227#define CONFIG_CMDLINE_EDITING 1
228
Stelian Popd99a8ff2008-05-08 20:52:22 +0200229/*
230 * Size of malloc() pool
231 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200232#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
233#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
Stelian Popd99a8ff2008-05-08 20:52:22 +0200234
235#define CONFIG_STACKSIZE (32*1024) /* regular stack */
236
237#ifdef CONFIG_USE_IRQ
238#error CONFIG_USE_IRQ not supported
239#endif
240
241#endif