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wdenkdc7c9a12003-03-26 06:55:25 +00001/*
2 * (C) Copyright 2002
3 * Lineo, Inc <www.lineo.com>
4 * Bernhard Kuhn <bkuhn@lineo.com>
5 *
6 * (C) Copyright 2002
7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
8 * Marius Groeger <mgroeger@sysgo.de>
9 *
10 * (C) Copyright 2002
11 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
12 * Alex Zuepke <azu@sysgo.de>
13 *
14 * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw@its.tudelft.nl)
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 *
30 */
31
32#include <common.h>
wdenk85ec0bc2003-03-31 16:34:49 +000033#include <asm/io.h>
wdenkb783eda2003-06-25 22:26:29 +000034#include <asm/arch/hardware.h>
wdenkdc7c9a12003-03-26 06:55:25 +000035
wdenk2cbe5712004-10-10 17:05:18 +000036#if !defined(CONFIG_DBGU) && !defined(CONFIG_USART0) && !defined(CONFIG_USART1)
37#error must define one of CONFIG_DBGU or CONFIG_USART0 or CONFIG_USART1
wdenk4734cb72004-09-21 23:33:32 +000038#endif
39
wdenkdc7c9a12003-03-26 06:55:25 +000040/* ggi thunder */
wdenk4734cb72004-09-21 23:33:32 +000041#ifdef CONFIG_DBGU
wdenkdc7c9a12003-03-26 06:55:25 +000042AT91PS_USART us = (AT91PS_USART) AT91C_BASE_DBGU;
wdenk4734cb72004-09-21 23:33:32 +000043#endif
wdenk2cbe5712004-10-10 17:05:18 +000044#ifdef CONFIG_USART0
45AT91PS_USART us = (AT91PS_USART) AT91C_BASE_US0;
46#endif
wdenk4734cb72004-09-21 23:33:32 +000047#ifdef CONFIG_USART1
48AT91PS_USART us = (AT91PS_USART) AT91C_BASE_US1;
49#endif
wdenkdc7c9a12003-03-26 06:55:25 +000050
wdenkd9df1f42004-03-15 09:00:01 +000051void serial_setbrg (void)
52{
53 DECLARE_GLOBAL_DATA_PTR;
54 int baudrate;
wdenkdc7c9a12003-03-26 06:55:25 +000055
wdenk2cbe5712004-10-10 17:05:18 +000056 if ((baudrate = gd->baudrate) <= 0)
wdenkd9df1f42004-03-15 09:00:01 +000057 baudrate = CONFIG_BAUDRATE;
wdenk9d5028c2004-11-21 00:06:33 +000058 if (baudrate == 0 || baudrate == CONFIG_BAUDRATE)
wdenk2cbe5712004-10-10 17:05:18 +000059 us->US_BRGR = CFG_AT91C_BRGR_DIVISOR; /* hardcode so no __divsi3 */
wdenk9d5028c2004-11-21 00:06:33 +000060 else
wdenk2cbe5712004-10-10 17:05:18 +000061 /* MASTER_CLOCK/(16 * baudrate) */
62 us->US_BRGR = (AT91C_MASTER_CLOCK >> 4)/baudrate;
wdenkd9df1f42004-03-15 09:00:01 +000063}
wdenkdc7c9a12003-03-26 06:55:25 +000064
wdenkd9df1f42004-03-15 09:00:01 +000065int serial_init (void)
66{
67 /* make any port initializations specific to this port */
wdenk4734cb72004-09-21 23:33:32 +000068#ifdef CONFIG_DBGU
wdenkd9df1f42004-03-15 09:00:01 +000069 *AT91C_PIOA_PDR = AT91C_PA31_DTXD | AT91C_PA30_DRXD; /* PA 31 & 30 */
70 *AT91C_PMC_PCER = 1 << AT91C_ID_SYS; /* enable clock */
wdenk4734cb72004-09-21 23:33:32 +000071#endif
wdenk2cbe5712004-10-10 17:05:18 +000072#ifdef CONFIG_USART0
73 *AT91C_PIOA_PDR = AT91C_PA17_TXD0 | AT91C_PA18_RXD0;
74 *AT91C_PMC_PCER |= 1 << AT91C_ID_USART0; /* enable clock */
75#endif
wdenk4734cb72004-09-21 23:33:32 +000076#ifdef CONFIG_USART1
77 *AT91C_PIOB_PDR = AT91C_PB21_TXD1 | AT91C_PB20_RXD1;
78 *AT91C_PMC_PCER |= 1 << AT91C_ID_USART1; /* enable clock */
79#endif
wdenkd9df1f42004-03-15 09:00:01 +000080 serial_setbrg ();
wdenkdc7c9a12003-03-26 06:55:25 +000081
wdenkd9df1f42004-03-15 09:00:01 +000082 us->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX;
83 us->US_CR = AT91C_US_RXEN | AT91C_US_TXEN;
84 us->US_MR =
85 (AT91C_US_CLKS_CLOCK | AT91C_US_CHRL_8_BITS |
86 AT91C_US_PAR_NONE | AT91C_US_NBSTOP_1_BIT);
87 us->US_IMR = ~0ul;
88 return (0);
89}
wdenkdc7c9a12003-03-26 06:55:25 +000090
wdenkd9df1f42004-03-15 09:00:01 +000091void serial_putc (const char c)
92{
93 if (c == '\n')
94 serial_putc ('\r');
95 while ((us->US_CSR & AT91C_US_TXRDY) == 0);
96 us->US_THR = c;
97}
wdenkdc7c9a12003-03-26 06:55:25 +000098
wdenkd9df1f42004-03-15 09:00:01 +000099void serial_puts (const char *s)
100{
101 while (*s) {
102 serial_putc (*s++);
103 }
104}
wdenkdc7c9a12003-03-26 06:55:25 +0000105
wdenkd9df1f42004-03-15 09:00:01 +0000106int serial_getc (void)
107{
108 while ((us->US_CSR & AT91C_US_RXRDY) == 0);
109 return us->US_RHR;
110}
wdenkdc7c9a12003-03-26 06:55:25 +0000111
wdenkd9df1f42004-03-15 09:00:01 +0000112int serial_tstc (void)
113{
114 return ((us->US_CSR & AT91C_US_RXRDY) == AT91C_US_RXRDY);
115}