blob: 9c02ceb153c3356300d87365104f7102a204fc56 [file] [log] [blame]
wdenk81a88242002-10-26 15:22:42 +00001/*
2 * (C) Copyright 2001
3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24/*
25 * I2C Functions similar to the standard memory functions.
26 *
27 * There are several parameters in many of the commands that bear further
28 * explanations:
29 *
30 * Two of the commands (imm and imw) take a byte/word/long modifier
31 * (e.g. imm.w specifies the word-length modifier). This was done to
32 * allow manipulating word-length registers. It was not done on any other
33 * commands because it was not deemed useful.
34 *
35 * {i2c_chip} is the I2C chip address (the first byte sent on the bus).
36 * Each I2C chip on the bus has a unique address. On the I2C data bus,
37 * the address is the upper seven bits and the LSB is the "read/write"
38 * bit. Note that the {i2c_chip} address specified on the command
39 * line is not shifted up: e.g. a typical EEPROM memory chip may have
40 * an I2C address of 0x50, but the data put on the bus will be 0xA0
41 * for write and 0xA1 for read. This "non shifted" address notation
42 * matches at least half of the data sheets :-/.
43 *
44 * {addr} is the address (or offset) within the chip. Small memory
45 * chips have 8 bit addresses. Large memory chips have 16 bit
46 * addresses. Other memory chips have 9, 10, or 11 bit addresses.
47 * Many non-memory chips have multiple registers and {addr} is used
48 * as the register index. Some non-memory chips have only one register
49 * and therefore don't need any {addr} parameter.
50 *
51 * The default {addr} parameter is one byte (.1) which works well for
52 * memories and registers with 8 bits of address space.
53 *
54 * You can specify the length of the {addr} field with the optional .0,
55 * .1, or .2 modifier (similar to the .b, .w, .l modifier). If you are
56 * manipulating a single register device which doesn't use an address
57 * field, use "0.0" for the address and the ".0" length field will
58 * suppress the address in the I2C data stream. This also works for
59 * successive reads using the I2C auto-incrementing memory pointer.
60 *
61 * If you are manipulating a large memory with 2-byte addresses, use
62 * the .2 address modifier, e.g. 210.2 addresses location 528 (decimal).
63 *
64 * Then there are the unfortunate memory chips that spill the most
65 * significant 1, 2, or 3 bits of address into the chip address byte.
66 * This effectively makes one chip (logically) look like 2, 4, or
67 * 8 chips. This is handled (awkwardly) by #defining
68 * CFG_I2C_EEPROM_ADDR_OVERFLOW and using the .1 modifier on the
69 * {addr} field (since .1 is the default, it doesn't actually have to
70 * be specified). Examples: given a memory chip at I2C chip address
71 * 0x50, the following would happen...
72 * imd 50 0 10 display 16 bytes starting at 0x000
73 * On the bus: <S> A0 00 <E> <S> A1 <rd> ... <rd>
74 * imd 50 100 10 display 16 bytes starting at 0x100
75 * On the bus: <S> A2 00 <E> <S> A3 <rd> ... <rd>
76 * imd 50 210 10 display 16 bytes starting at 0x210
77 * On the bus: <S> A4 10 <E> <S> A5 <rd> ... <rd>
78 * This is awfully ugly. It would be nice if someone would think up
79 * a better way of handling this.
80 *
81 * Adapted from cmd_mem.c which is copyright Wolfgang Denk (wd@denx.de).
82 */
83
84#include <common.h>
85#include <command.h>
wdenk81a88242002-10-26 15:22:42 +000086#include <i2c.h>
87#include <asm/byteorder.h>
88
89#if (CONFIG_COMMANDS & CFG_CMD_I2C)
90
91
92/* Display values from last command.
93 * Memory modify remembered values are different from display memory.
94 */
95static uchar i2c_dp_last_chip;
96static uint i2c_dp_last_addr;
97static uint i2c_dp_last_alen;
98static uint i2c_dp_last_length = 0x10;
99
100static uchar i2c_mm_last_chip;
101static uint i2c_mm_last_addr;
102static uint i2c_mm_last_alen;
103
104#if defined(CFG_I2C_NOPROBES)
105static uchar i2c_no_probes[] = CFG_I2C_NOPROBES;
106#endif
107
108static int
109mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[]);
110extern int cmd_get_data_size(char* arg, int default_size);
111
112/*
113 * Syntax:
114 * imd {i2c_chip} {addr}{.0, .1, .2} {len}
115 */
116#define DISP_LINE_LEN 16
117
118int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
119{
120 u_char chip;
121 uint addr, alen, length;
122 int j, nbytes, linebytes;
123
124 /* We use the last specified parameters, unless new ones are
125 * entered.
126 */
127 chip = i2c_dp_last_chip;
128 addr = i2c_dp_last_addr;
129 alen = i2c_dp_last_alen;
130 length = i2c_dp_last_length;
131
132 if (argc < 3) {
133 printf ("Usage:\n%s\n", cmdtp->usage);
134 return 1;
135 }
136
137 if ((flag & CMD_FLAG_REPEAT) == 0) {
138 /*
139 * New command specified.
140 */
141 alen = 1;
142
143 /*
144 * I2C chip address
145 */
146 chip = simple_strtoul(argv[1], NULL, 16);
147
148 /*
149 * I2C data address within the chip. This can be 1 or
150 * 2 bytes long. Some day it might be 3 bytes long :-).
151 */
152 addr = simple_strtoul(argv[2], NULL, 16);
153 alen = 1;
154 for(j = 0; j < 8; j++) {
155 if (argv[2][j] == '.') {
156 alen = argv[2][j+1] - '0';
157 if (alen > 4) {
158 printf ("Usage:\n%s\n", cmdtp->usage);
159 return 1;
160 }
161 break;
162 } else if (argv[2][j] == '\0') {
163 break;
164 }
165 }
166
167 /*
168 * If another parameter, it is the length to display.
169 * Length is the number of objects, not number of bytes.
170 */
171 if (argc > 3)
172 length = simple_strtoul(argv[3], NULL, 16);
173 }
174
175 /*
176 * Print the lines.
177 *
178 * We buffer all read data, so we can make sure data is read only
179 * once.
180 */
181 nbytes = length;
182 do {
183 unsigned char linebuf[DISP_LINE_LEN];
184 unsigned char *cp;
185
186 linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;
187
188 if(i2c_read(chip, addr, alen, linebuf, linebytes) != 0) {
wdenk4b9206e2004-03-23 22:14:11 +0000189 puts ("Error reading the chip.\n");
wdenk81a88242002-10-26 15:22:42 +0000190 } else {
191 printf("%04x:", addr);
192 cp = linebuf;
193 for (j=0; j<linebytes; j++) {
194 printf(" %02x", *cp++);
195 addr++;
196 }
wdenk4b9206e2004-03-23 22:14:11 +0000197 puts (" ");
wdenk81a88242002-10-26 15:22:42 +0000198 cp = linebuf;
199 for (j=0; j<linebytes; j++) {
200 if ((*cp < 0x20) || (*cp > 0x7e))
wdenk4b9206e2004-03-23 22:14:11 +0000201 puts (".");
wdenk81a88242002-10-26 15:22:42 +0000202 else
203 printf("%c", *cp);
204 cp++;
205 }
wdenk4b9206e2004-03-23 22:14:11 +0000206 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000207 }
208 nbytes -= linebytes;
209 } while (nbytes > 0);
210
211 i2c_dp_last_chip = chip;
212 i2c_dp_last_addr = addr;
213 i2c_dp_last_alen = alen;
214 i2c_dp_last_length = length;
215
216 return 0;
217}
218
219int do_i2c_mm ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
220{
221 return mod_i2c_mem (cmdtp, 1, flag, argc, argv);
222}
223
224
225int do_i2c_nm ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
226{
227 return mod_i2c_mem (cmdtp, 0, flag, argc, argv);
228}
229
230/* Write (fill) memory
231 *
232 * Syntax:
233 * imw {i2c_chip} {addr}{.0, .1, .2} {data} [{count}]
234 */
235int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
236{
237 uchar chip;
238 ulong addr;
239 uint alen;
240 uchar byte;
241 int count;
242 int j;
243
244 if ((argc < 4) || (argc > 5)) {
245 printf ("Usage:\n%s\n", cmdtp->usage);
246 return 1;
247 }
248
249 /*
250 * Chip is always specified.
251 */
252 chip = simple_strtoul(argv[1], NULL, 16);
253
254 /*
255 * Address is always specified.
256 */
257 addr = simple_strtoul(argv[2], NULL, 16);
258 alen = 1;
259 for(j = 0; j < 8; j++) {
260 if (argv[2][j] == '.') {
261 alen = argv[2][j+1] - '0';
262 if(alen > 4) {
263 printf ("Usage:\n%s\n", cmdtp->usage);
264 return 1;
265 }
266 break;
267 } else if (argv[2][j] == '\0') {
268 break;
269 }
270 }
271
272 /*
273 * Value to write is always specified.
274 */
275 byte = simple_strtoul(argv[3], NULL, 16);
276
277 /*
278 * Optional count
279 */
280 if(argc == 5) {
281 count = simple_strtoul(argv[4], NULL, 16);
282 } else {
283 count = 1;
284 }
285
286 while (count-- > 0) {
287 if(i2c_write(chip, addr++, alen, &byte, 1) != 0) {
wdenk4b9206e2004-03-23 22:14:11 +0000288 puts ("Error writing the chip.\n");
wdenk81a88242002-10-26 15:22:42 +0000289 }
290 /*
291 * Wait for the write to complete. The write can take
292 * up to 10mSec (we allow a little more time).
293 *
294 * On some chips, while the write is in progress, the
295 * chip doesn't respond. This apparently isn't a
296 * universal feature so we don't take advantage of it.
297 */
298 udelay(11000);
299#if 0
300 for(timeout = 0; timeout < 10; timeout++) {
301 udelay(2000);
302 if(i2c_probe(chip) == 0)
303 break;
304 }
305#endif
306 }
307
308 return (0);
309}
310
311
312/* Calculate a CRC on memory
313 *
314 * Syntax:
315 * icrc32 {i2c_chip} {addr}{.0, .1, .2} {count}
316 */
317int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
318{
319 uchar chip;
320 ulong addr;
321 uint alen;
322 int count;
323 uchar byte;
324 ulong crc;
325 ulong err;
326 int j;
327
328 if (argc < 4) {
329 printf ("Usage:\n%s\n", cmdtp->usage);
330 return 1;
331 }
332
333 /*
334 * Chip is always specified.
335 */
336 chip = simple_strtoul(argv[1], NULL, 16);
337
338 /*
339 * Address is always specified.
340 */
341 addr = simple_strtoul(argv[2], NULL, 16);
342 alen = 1;
343 for(j = 0; j < 8; j++) {
344 if (argv[2][j] == '.') {
345 alen = argv[2][j+1] - '0';
346 if(alen > 4) {
347 printf ("Usage:\n%s\n", cmdtp->usage);
348 return 1;
349 }
350 break;
351 } else if (argv[2][j] == '\0') {
352 break;
353 }
354 }
355
356 /*
357 * Count is always specified
358 */
359 count = simple_strtoul(argv[3], NULL, 16);
360
361 printf ("CRC32 for %08lx ... %08lx ==> ", addr, addr + count - 1);
362 /*
363 * CRC a byte at a time. This is going to be slooow, but hey, the
364 * memories are small and slow too so hopefully nobody notices.
365 */
366 crc = 0;
367 err = 0;
368 while(count-- > 0) {
369 if(i2c_read(chip, addr, alen, &byte, 1) != 0) {
370 err++;
371 }
372 crc = crc32 (crc, &byte, 1);
373 addr++;
374 }
375 if(err > 0)
376 {
wdenk4b9206e2004-03-23 22:14:11 +0000377 puts ("Error reading the chip,\n");
wdenk81a88242002-10-26 15:22:42 +0000378 } else {
379 printf ("%08lx\n", crc);
380 }
381
382 return 0;
383}
384
385
386/* Modify memory.
387 *
388 * Syntax:
389 * imm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
390 * inm{.b, .w, .l} {i2c_chip} {addr}{.0, .1, .2}
391 */
392
393static int
394mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
395{
396 uchar chip;
397 ulong addr;
398 uint alen;
399 ulong data;
400 int size = 1;
401 int nbytes;
402 int j;
403 extern char console_buffer[];
404
405 if (argc != 3) {
406 printf ("Usage:\n%s\n", cmdtp->usage);
407 return 1;
408 }
409
410#ifdef CONFIG_BOOT_RETRY_TIME
411 reset_cmd_timeout(); /* got a good command to get here */
412#endif
413 /*
414 * We use the last specified parameters, unless new ones are
415 * entered.
416 */
417 chip = i2c_mm_last_chip;
418 addr = i2c_mm_last_addr;
419 alen = i2c_mm_last_alen;
420
421 if ((flag & CMD_FLAG_REPEAT) == 0) {
422 /*
423 * New command specified. Check for a size specification.
424 * Defaults to byte if no or incorrect specification.
425 */
426 size = cmd_get_data_size(argv[0], 1);
427
428 /*
429 * Chip is always specified.
430 */
431 chip = simple_strtoul(argv[1], NULL, 16);
432
433 /*
434 * Address is always specified.
435 */
436 addr = simple_strtoul(argv[2], NULL, 16);
437 alen = 1;
438 for(j = 0; j < 8; j++) {
439 if (argv[2][j] == '.') {
440 alen = argv[2][j+1] - '0';
441 if(alen > 4) {
442 printf ("Usage:\n%s\n", cmdtp->usage);
443 return 1;
444 }
445 break;
446 } else if (argv[2][j] == '\0') {
447 break;
448 }
449 }
450 }
451
452 /*
453 * Print the address, followed by value. Then accept input for
454 * the next value. A non-converted value exits.
455 */
456 do {
457 printf("%08lx:", addr);
458 if(i2c_read(chip, addr, alen, (char *)&data, size) != 0) {
wdenk4b9206e2004-03-23 22:14:11 +0000459 puts ("\nError reading the chip,\n");
wdenk81a88242002-10-26 15:22:42 +0000460 } else {
461 data = cpu_to_be32(data);
462 if(size == 1) {
463 printf(" %02lx", (data >> 24) & 0x000000FF);
464 } else if(size == 2) {
465 printf(" %04lx", (data >> 16) & 0x0000FFFF);
466 } else {
467 printf(" %08lx", data);
468 }
469 }
470
471 nbytes = readline (" ? ");
472 if (nbytes == 0) {
473 /*
474 * <CR> pressed as only input, don't modify current
475 * location and move to next.
476 */
477 if (incrflag)
478 addr += size;
479 nbytes = size;
480#ifdef CONFIG_BOOT_RETRY_TIME
481 reset_cmd_timeout(); /* good enough to not time out */
482#endif
483 }
484#ifdef CONFIG_BOOT_RETRY_TIME
485 else if (nbytes == -2) {
486 break; /* timed out, exit the command */
487 }
488#endif
489 else {
490 char *endp;
491
492 data = simple_strtoul(console_buffer, &endp, 16);
493 if(size == 1) {
494 data = data << 24;
495 } else if(size == 2) {
496 data = data << 16;
497 }
498 data = be32_to_cpu(data);
499 nbytes = endp - console_buffer;
500 if (nbytes) {
501#ifdef CONFIG_BOOT_RETRY_TIME
502 /*
503 * good enough to not time out
504 */
505 reset_cmd_timeout();
506#endif
507 if(i2c_write(chip, addr, alen, (char *)&data, size) != 0) {
wdenk4b9206e2004-03-23 22:14:11 +0000508 puts ("Error writing the chip.\n");
wdenk81a88242002-10-26 15:22:42 +0000509 }
wdenk2535d602003-07-17 23:16:40 +0000510#ifdef CFG_EEPROM_PAGE_WRITE_DELAY_MS
511 udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
512#endif
wdenk81a88242002-10-26 15:22:42 +0000513 if (incrflag)
514 addr += size;
515 }
516 }
517 } while (nbytes);
518
519 chip = i2c_mm_last_chip;
520 addr = i2c_mm_last_addr;
521 alen = i2c_mm_last_alen;
522
523 return 0;
524}
525
526/*
527 * Syntax:
528 * iprobe {addr}{.0, .1, .2}
529 */
530int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
531{
532 int j;
533#if defined(CFG_I2C_NOPROBES)
534 int k, skip;
535#endif
536
wdenk4b9206e2004-03-23 22:14:11 +0000537 puts ("Valid chip addresses:");
wdenk81a88242002-10-26 15:22:42 +0000538 for(j = 0; j < 128; j++) {
539#if defined(CFG_I2C_NOPROBES)
540 skip = 0;
541 for (k = 0; k < sizeof(i2c_no_probes); k++){
542 if (j == i2c_no_probes[k]){
543 skip = 1;
544 break;
545 }
546 }
547 if (skip)
548 continue;
549#endif
550 if(i2c_probe(j) == 0) {
551 printf(" %02X", j);
552 }
553 }
wdenk4b9206e2004-03-23 22:14:11 +0000554 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000555
556#if defined(CFG_I2C_NOPROBES)
557 puts ("Excluded chip addresses:");
558 for( k = 0; k < sizeof(i2c_no_probes); k++ )
559 printf(" %02X", i2c_no_probes[k] );
wdenk4b9206e2004-03-23 22:14:11 +0000560 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000561#endif
562
563 return 0;
564}
565
566
567/*
568 * Syntax:
569 * iloop {i2c_chip} {addr}{.0, .1, .2} [{length}] [{delay}]
570 * {length} - Number of bytes to read
571 * {delay} - A DECIMAL number and defaults to 1000 uSec
572 */
573int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
574{
575 u_char chip;
576 ulong alen;
577 uint addr;
578 uint length;
579 u_char bytes[16];
580 int delay;
581 int j;
582
583 if (argc < 3) {
584 printf ("Usage:\n%s\n", cmdtp->usage);
585 return 1;
586 }
587
588 /*
589 * Chip is always specified.
590 */
591 chip = simple_strtoul(argv[1], NULL, 16);
592
593 /*
594 * Address is always specified.
595 */
596 addr = simple_strtoul(argv[2], NULL, 16);
597 alen = 1;
598 for(j = 0; j < 8; j++) {
599 if (argv[2][j] == '.') {
600 alen = argv[2][j+1] - '0';
601 if (alen > 4) {
602 printf ("Usage:\n%s\n", cmdtp->usage);
603 return 1;
604 }
605 break;
606 } else if (argv[2][j] == '\0') {
607 break;
608 }
609 }
610
611 /*
612 * Length is the number of objects, not number of bytes.
613 */
614 length = 1;
615 length = simple_strtoul(argv[3], NULL, 16);
616 if(length > sizeof(bytes)) {
617 length = sizeof(bytes);
618 }
619
620 /*
621 * The delay time (uSec) is optional.
622 */
623 delay = 1000;
624 if (argc > 3) {
625 delay = simple_strtoul(argv[4], NULL, 10);
626 }
627 /*
628 * Run the loop...
629 */
630 while(1) {
631 if(i2c_read(chip, addr, alen, bytes, length) != 0) {
wdenk4b9206e2004-03-23 22:14:11 +0000632 puts ("Error reading the chip.\n");
wdenk81a88242002-10-26 15:22:42 +0000633 }
634 udelay(delay);
635 }
636
637 /* NOTREACHED */
638 return 0;
639}
640
641
642/*
643 * The SDRAM command is separately configured because many
644 * (most?) embedded boards don't use SDRAM DIMMs.
645 */
646#if (CONFIG_COMMANDS & CFG_CMD_SDRAM)
647
648/*
649 * Syntax:
650 * sdram {i2c_chip}
651 */
652int do_sdram ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
653{
654 u_char chip;
655 u_char data[128];
656 u_char cksum;
657 int j;
658
659 if (argc < 2) {
660 printf ("Usage:\n%s\n", cmdtp->usage);
661 return 1;
662 }
663 /*
664 * Chip is always specified.
665 */
666 chip = simple_strtoul(argv[1], NULL, 16);
667
668 if(i2c_read(chip, 0, 1, data, sizeof(data)) != 0) {
wdenk4b9206e2004-03-23 22:14:11 +0000669 puts ("No SDRAM Serial Presence Detect found.\n");
wdenk81a88242002-10-26 15:22:42 +0000670 return 1;
671 }
672
673 cksum = 0;
674 for (j = 0; j < 63; j++) {
675 cksum += data[j];
676 }
677 if(cksum != data[63]) {
678 printf ("WARNING: Configuration data checksum failure:\n"
679 " is 0x%02x, calculated 0x%02x\n",
680 data[63], cksum);
681 }
682 printf("SPD data revision %d.%d\n",
683 (data[62] >> 4) & 0x0F, data[62] & 0x0F);
684 printf("Bytes used 0x%02X\n", data[0]);
685 printf("Serial memory size 0x%02X\n", 1 << data[1]);
wdenk4b9206e2004-03-23 22:14:11 +0000686 puts ("Memory type ");
wdenk81a88242002-10-26 15:22:42 +0000687 switch(data[2]) {
wdenk4b9206e2004-03-23 22:14:11 +0000688 case 2: puts ("EDO\n"); break;
689 case 4: puts ("SDRAM\n"); break;
690 default: puts ("unknown\n"); break;
wdenk81a88242002-10-26 15:22:42 +0000691 }
wdenk4b9206e2004-03-23 22:14:11 +0000692 puts ("Row address bits ");
wdenk81a88242002-10-26 15:22:42 +0000693 if((data[3] & 0x00F0) == 0) {
694 printf("%d\n", data[3] & 0x0F);
695 } else {
696 printf("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F);
697 }
wdenk4b9206e2004-03-23 22:14:11 +0000698 puts ("Column address bits ");
wdenk81a88242002-10-26 15:22:42 +0000699 if((data[4] & 0x00F0) == 0) {
700 printf("%d\n", data[4] & 0x0F);
701 } else {
702 printf("%d/%d\n", data[4] & 0x0F, (data[4] >> 4) & 0x0F);
703 }
704 printf("Module rows %d\n", data[5]);
705 printf("Module data width %d bits\n", (data[7] << 8) | data[6]);
wdenk4b9206e2004-03-23 22:14:11 +0000706 puts ("Interface signal levels ");
wdenk81a88242002-10-26 15:22:42 +0000707 switch(data[8]) {
wdenk4b9206e2004-03-23 22:14:11 +0000708 case 0: puts ("5.0v/TTL\n"); break;
709 case 1: puts ("LVTTL\n"); break;
710 case 2: puts ("HSTL 1.5\n"); break;
711 case 3: puts ("SSTL 3.3\n"); break;
712 case 4: puts ("SSTL 2.5\n"); break;
713 default: puts ("unknown\n"); break;
wdenk81a88242002-10-26 15:22:42 +0000714 }
715 printf("SDRAM cycle time %d.%d nS\n",
716 (data[9] >> 4) & 0x0F, data[9] & 0x0F);
717 printf("SDRAM access time %d.%d nS\n",
718 (data[10] >> 4) & 0x0F, data[10] & 0x0F);
wdenk4b9206e2004-03-23 22:14:11 +0000719 puts ("EDC configuration ");
wdenk81a88242002-10-26 15:22:42 +0000720 switch(data[11]) {
wdenk4b9206e2004-03-23 22:14:11 +0000721 case 0: puts ("None\n"); break;
722 case 1: puts ("Parity\n"); break;
723 case 2: puts ("ECC\n"); break;
724 default: puts ("unknown\n"); break;
wdenk81a88242002-10-26 15:22:42 +0000725 }
726 if((data[12] & 0x80) == 0) {
wdenk4b9206e2004-03-23 22:14:11 +0000727 puts ("No self refresh, rate ");
wdenk81a88242002-10-26 15:22:42 +0000728 } else {
wdenk4b9206e2004-03-23 22:14:11 +0000729 puts ("Self refresh, rate ");
wdenk81a88242002-10-26 15:22:42 +0000730 }
731 switch(data[12] & 0x7F) {
wdenk4b9206e2004-03-23 22:14:11 +0000732 case 0: puts ("15.625uS\n"); break;
733 case 1: puts ("3.9uS\n"); break;
734 case 2: puts ("7.8uS\n"); break;
735 case 3: puts ("31.3uS\n"); break;
736 case 4: puts ("62.5uS\n"); break;
737 case 5: puts ("125uS\n"); break;
738 default: puts ("unknown\n"); break;
wdenk81a88242002-10-26 15:22:42 +0000739 }
740 printf("SDRAM width (primary) %d\n", data[13] & 0x7F);
741 if((data[13] & 0x80) != 0) {
742 printf(" (second bank) %d\n",
743 2 * (data[13] & 0x7F));
744 }
745 if(data[14] != 0) {
746 printf("EDC width %d\n",
747 data[14] & 0x7F);
748 if((data[14] & 0x80) != 0) {
749 printf(" (second bank) %d\n",
750 2 * (data[14] & 0x7F));
751 }
752 }
753 printf("Min clock delay, back-to-back random column addresses %d\n",
754 data[15]);
wdenk4b9206e2004-03-23 22:14:11 +0000755 puts ("Burst length(s) ");
756 if (data[16] & 0x80) puts (" Page");
757 if (data[16] & 0x08) puts (" 8");
758 if (data[16] & 0x04) puts (" 4");
759 if (data[16] & 0x02) puts (" 2");
760 if (data[16] & 0x01) puts (" 1");
761 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000762 printf("Number of banks %d\n", data[17]);
wdenk4b9206e2004-03-23 22:14:11 +0000763 puts ("CAS latency(s) ");
764 if (data[18] & 0x80) puts (" TBD");
765 if (data[18] & 0x40) puts (" 7");
766 if (data[18] & 0x20) puts (" 6");
767 if (data[18] & 0x10) puts (" 5");
768 if (data[18] & 0x08) puts (" 4");
769 if (data[18] & 0x04) puts (" 3");
770 if (data[18] & 0x02) puts (" 2");
771 if (data[18] & 0x01) puts (" 1");
772 putc ('\n');
773 puts ("CS latency(s) ");
774 if (data[19] & 0x80) puts (" TBD");
775 if (data[19] & 0x40) puts (" 6");
776 if (data[19] & 0x20) puts (" 5");
777 if (data[19] & 0x10) puts (" 4");
778 if (data[19] & 0x08) puts (" 3");
779 if (data[19] & 0x04) puts (" 2");
780 if (data[19] & 0x02) puts (" 1");
781 if (data[19] & 0x01) puts (" 0");
782 putc ('\n');
783 puts ("WE latency(s) ");
784 if (data[20] & 0x80) puts (" TBD");
785 if (data[20] & 0x40) puts (" 6");
786 if (data[20] & 0x20) puts (" 5");
787 if (data[20] & 0x10) puts (" 4");
788 if (data[20] & 0x08) puts (" 3");
789 if (data[20] & 0x04) puts (" 2");
790 if (data[20] & 0x02) puts (" 1");
791 if (data[20] & 0x01) puts (" 0");
792 putc ('\n');
793 puts ("Module attributes:\n");
794 if (!data[21]) puts (" (none)\n");
795 if (data[21] & 0x80) puts (" TBD (bit 7)\n");
796 if (data[21] & 0x40) puts (" Redundant row address\n");
797 if (data[21] & 0x20) puts (" Differential clock input\n");
798 if (data[21] & 0x10) puts (" Registerd DQMB inputs\n");
799 if (data[21] & 0x08) puts (" Buffered DQMB inputs\n");
800 if (data[21] & 0x04) puts (" On-card PLL\n");
801 if (data[21] & 0x02) puts (" Registered address/control lines\n");
802 if (data[21] & 0x01) puts (" Buffered address/control lines\n");
803 puts ("Device attributes:\n");
804 if (data[22] & 0x80) puts (" TBD (bit 7)\n");
805 if (data[22] & 0x40) puts (" TBD (bit 6)\n");
806 if (data[22] & 0x20) puts (" Upper Vcc tolerance 5%\n");
807 else puts (" Upper Vcc tolerance 10%\n");
808 if (data[22] & 0x10) puts (" Lower Vcc tolerance 5%\n");
809 else puts (" Lower Vcc tolerance 10%\n");
810 if (data[22] & 0x08) puts (" Supports write1/read burst\n");
811 if (data[22] & 0x04) puts (" Supports precharge all\n");
812 if (data[22] & 0x02) puts (" Supports auto precharge\n");
813 if (data[22] & 0x01) puts (" Supports early RAS# precharge\n");
wdenk81a88242002-10-26 15:22:42 +0000814 printf("SDRAM cycle time (2nd highest CAS latency) %d.%d nS\n",
815 (data[23] >> 4) & 0x0F, data[23] & 0x0F);
816 printf("SDRAM access from clock (2nd highest CAS latency) %d.%d nS\n",
817 (data[24] >> 4) & 0x0F, data[24] & 0x0F);
818 printf("SDRAM cycle time (3rd highest CAS latency) %d.%d nS\n",
819 (data[25] >> 4) & 0x0F, data[25] & 0x0F);
820 printf("SDRAM access from clock (3rd highest CAS latency) %d.%d nS\n",
821 (data[26] >> 4) & 0x0F, data[26] & 0x0F);
822 printf("Minimum row precharge %d nS\n", data[27]);
823 printf("Row active to row active min %d nS\n", data[28]);
824 printf("RAS to CAS delay min %d nS\n", data[29]);
825 printf("Minimum RAS pulse width %d nS\n", data[30]);
wdenk4b9206e2004-03-23 22:14:11 +0000826 puts ("Density of each row ");
827 if (data[31] & 0x80) puts (" 512");
828 if (data[31] & 0x40) puts (" 256");
829 if (data[31] & 0x20) puts (" 128");
830 if (data[31] & 0x10) puts (" 64");
831 if (data[31] & 0x08) puts (" 32");
832 if (data[31] & 0x04) puts (" 16");
833 if (data[31] & 0x02) puts (" 8");
834 if (data[31] & 0x01) puts (" 4");
835 puts ("MByte\n");
wdenk81a88242002-10-26 15:22:42 +0000836 printf("Command and Address setup %c%d.%d nS\n",
837 (data[32] & 0x80) ? '-' : '+',
838 (data[32] >> 4) & 0x07, data[32] & 0x0F);
839 printf("Command and Address hold %c%d.%d nS\n",
840 (data[33] & 0x80) ? '-' : '+',
841 (data[33] >> 4) & 0x07, data[33] & 0x0F);
842 printf("Data signal input setup %c%d.%d nS\n",
843 (data[34] & 0x80) ? '-' : '+',
844 (data[34] >> 4) & 0x07, data[34] & 0x0F);
845 printf("Data signal input hold %c%d.%d nS\n",
846 (data[35] & 0x80) ? '-' : '+',
847 (data[35] >> 4) & 0x07, data[35] & 0x0F);
wdenk4b9206e2004-03-23 22:14:11 +0000848 puts ("Manufacturer's JEDEC ID ");
wdenk81a88242002-10-26 15:22:42 +0000849 for(j = 64; j <= 71; j++)
850 printf("%02X ", data[j]);
wdenk4b9206e2004-03-23 22:14:11 +0000851 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000852 printf("Manufacturing Location %02X\n", data[72]);
wdenk4b9206e2004-03-23 22:14:11 +0000853 puts ("Manufacturer's Part Number ");
wdenk81a88242002-10-26 15:22:42 +0000854 for(j = 73; j <= 90; j++)
855 printf("%02X ", data[j]);
wdenk4b9206e2004-03-23 22:14:11 +0000856 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000857 printf("Revision Code %02X %02X\n", data[91], data[92]);
858 printf("Manufacturing Date %02X %02X\n", data[93], data[94]);
wdenk4b9206e2004-03-23 22:14:11 +0000859 puts ("Assembly Serial Number ");
wdenk81a88242002-10-26 15:22:42 +0000860 for(j = 95; j <= 98; j++)
861 printf("%02X ", data[j]);
wdenk4b9206e2004-03-23 22:14:11 +0000862 putc ('\n');
wdenk81a88242002-10-26 15:22:42 +0000863 printf("Speed rating PC%d\n",
864 data[126] == 0x66 ? 66 : data[126]);
865
866 return 0;
867}
868#endif /* CFG_CMD_SDRAM */
869
wdenk8bde7f72003-06-27 21:31:46 +0000870
871/***************************************************/
872
wdenk0d498392003-07-01 21:06:45 +0000873U_BOOT_CMD(
874 imd, 4, 1, do_i2c_md, \
wdenk8bde7f72003-06-27 21:31:46 +0000875 "imd - i2c memory display\n", \
876 "chip address[.0, .1, .2] [# of objects]\n - i2c memory display\n" \
877);
878
wdenk0d498392003-07-01 21:06:45 +0000879U_BOOT_CMD(
880 imm, 3, 1, do_i2c_mm,
wdenk8bde7f72003-06-27 21:31:46 +0000881 "imm - i2c memory modify (auto-incrementing)\n",
882 "chip address[.0, .1, .2]\n"
883 " - memory modify, auto increment address\n"
884);
wdenk0d498392003-07-01 21:06:45 +0000885U_BOOT_CMD(
886 inm, 3, 1, do_i2c_nm,
wdenk8bde7f72003-06-27 21:31:46 +0000887 "inm - memory modify (constant address)\n",
888 "chip address[.0, .1, .2]\n - memory modify, read and keep address\n"
889);
890
wdenk0d498392003-07-01 21:06:45 +0000891U_BOOT_CMD(
892 imw, 5, 1, do_i2c_mw,
wdenk8bde7f72003-06-27 21:31:46 +0000893 "imw - memory write (fill)\n",
894 "chip address[.0, .1, .2] value [count]\n - memory write (fill)\n"
895);
896
wdenk0d498392003-07-01 21:06:45 +0000897U_BOOT_CMD(
898 icrc32, 5, 1, do_i2c_crc,
wdenk8bde7f72003-06-27 21:31:46 +0000899 "icrc32 - checksum calculation\n",
900 "chip address[.0, .1, .2] count\n - compute CRC32 checksum\n"
901);
902
wdenk0d498392003-07-01 21:06:45 +0000903U_BOOT_CMD(
904 iprobe, 1, 1, do_i2c_probe,
wdenk8bde7f72003-06-27 21:31:46 +0000905 "iprobe - probe to discover valid I2C chip addresses\n",
906 "\n -discover valid I2C chip addresses\n"
907);
908
909/*
910 * Require full name for "iloop" because it is an infinite loop!
911 */
wdenk0d498392003-07-01 21:06:45 +0000912U_BOOT_CMD(
913 iloop, 5, 1, do_i2c_loop,
wdenk8bde7f72003-06-27 21:31:46 +0000914 "iloop - infinite loop on address range\n",
915 "chip address[.0, .1, .2] [# of objects]\n"
916 " - loop, reading a set of addresses\n"
917);
918
919#if (CONFIG_COMMANDS & CFG_CMD_SDRAM)
wdenk0d498392003-07-01 21:06:45 +0000920U_BOOT_CMD(
921 isdram, 2, 1, do_sdram,
wdenk8bde7f72003-06-27 21:31:46 +0000922 "isdram - print SDRAM configuration information\n",
923 "chip\n - print SDRAM configuration information\n"
924 " (valid chip values 50..57)\n"
925);
926#endif
wdenk81a88242002-10-26 15:22:42 +0000927#endif /* CFG_CMD_I2C */