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Wolfgang Denk74f43042005-09-25 01:48:28 +02001/*
2 * armboot - Startup Code for ARM926EJS CPU-core
3 *
4 * Copyright (c) 2003 Texas Instruments
5 *
6 * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------
7 *
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
Detlev Zundel792a09e2009-05-13 10:54:10 +020010 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
Wolfgang Denk74f43042005-09-25 01:48:28 +020011 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
Albert Aribaud3336ca62010-11-25 22:45:02 +010013 * Copyright (c) 2010 Albert Aribaud <albert.aribaud@free.fr>
Wolfgang Denk74f43042005-09-25 01:48:28 +020014 *
15 * See file CREDITS for list of people who contributed to this
16 * project.
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA
32 */
33
Wolfgang Denk25ddd1f2010-10-26 14:34:52 +020034#include <asm-offsets.h>
Wolfgang Denk74f43042005-09-25 01:48:28 +020035#include <config.h>
36#include <version.h>
37
38/*
39 *************************************************************************
40 *
41 * Jump vector table as in table 3.1 in [1]
42 *
43 *************************************************************************
44 */
45
46
47.globl _start
48_start:
49 b reset
50 ldr pc, _undefined_instruction
51 ldr pc, _software_interrupt
52 ldr pc, _prefetch_abort
53 ldr pc, _data_abort
54 ldr pc, _not_used
55 ldr pc, _irq
56 ldr pc, _fiq
57
58_undefined_instruction:
59 .word undefined_instruction
60_software_interrupt:
61 .word software_interrupt
62_prefetch_abort:
63 .word prefetch_abort
64_data_abort:
65 .word data_abort
66_not_used:
67 .word not_used
68_irq:
69 .word irq
70_fiq:
71 .word fiq
72
73 .balignl 16,0xdeadbeef
74
Albert Aribaud3336ca62010-11-25 22:45:02 +010075_vectors_end:
Wolfgang Denk74f43042005-09-25 01:48:28 +020076
77/*
78 *************************************************************************
79 *
80 * Startup Code (reset vector)
81 *
82 * do important init only if we don't start from memory!
83 * setup Memory and board specific bits prior to relocation.
84 * relocate armboot to ram
85 * setup stack
86 *
87 *************************************************************************
88 */
89
Heiko Schocher5a8a87e2010-09-17 13:10:45 +020090.globl _TEXT_BASE
Wolfgang Denk74f43042005-09-25 01:48:28 +020091_TEXT_BASE:
Wolfgang Denk14d0a022010-10-07 21:51:12 +020092 .word CONFIG_SYS_TEXT_BASE
Wolfgang Denk74f43042005-09-25 01:48:28 +020093
Wolfgang Denk74f43042005-09-25 01:48:28 +020094/*
95 * These are defined in the board-specific linker script.
Albert Aribaud3336ca62010-11-25 22:45:02 +010096 * Subtracting _start from them lets the linker put their
97 * relative position in the executable instead of leaving
98 * them null.
Wolfgang Denk74f43042005-09-25 01:48:28 +020099 */
Albert Aribaud3336ca62010-11-25 22:45:02 +0100100.globl _bss_start_ofs
101_bss_start_ofs:
102 .word __bss_start - _start
Wolfgang Denk74f43042005-09-25 01:48:28 +0200103
Albert Aribaud3336ca62010-11-25 22:45:02 +0100104.globl _bss_end_ofs
105_bss_end_ofs:
Po-Yu Chuang44c6e652011-03-01 22:59:59 +0000106 .word __bss_end__ - _start
Wolfgang Denk74f43042005-09-25 01:48:28 +0200107
108#ifdef CONFIG_USE_IRQ
109/* IRQ stack memory (calculated at run-time) */
110.globl IRQ_STACK_START
111IRQ_STACK_START:
112 .word 0x0badc0de
113
114/* IRQ stack memory (calculated at run-time) */
115.globl FIQ_STACK_START
116FIQ_STACK_START:
117 .word 0x0badc0de
118#endif
119
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200120/* IRQ stack memory (calculated at run-time) + 8 bytes */
121.globl IRQ_STACK_START_IN
122IRQ_STACK_START_IN:
123 .word 0x0badc0de
Wolfgang Denk74f43042005-09-25 01:48:28 +0200124
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200125/*
126 * the actual reset code
127 */
128
129reset:
130 /*
131 * set the cpu to SVC32 mode
132 */
133 mrs r0,cpsr
134 bic r0,r0,#0x1f
135 orr r0,r0,#0xd3
136 msr cpsr,r0
137
138 /*
139 * we do sys-critical inits only at reboot,
140 * not when booting from ram!
141 */
142#ifndef CONFIG_SKIP_LOWLEVEL_INIT
143 bl cpu_init_crit
144#endif
145
146/* Set stackpointer in internal RAM to call board_init_f */
147call_board_init_f:
148 ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
Heiko Schocher296cae72010-11-12 07:53:55 +0100149 bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200150 ldr r0,=0x00000000
151 bl board_init_f
152
153/*------------------------------------------------------------------------------*/
154
155/*
156 * void relocate_code (addr_sp, gd, addr_moni)
157 *
158 * This "function" does not return, instead it continues in RAM
159 * after relocating the monitor code.
160 *
161 */
162 .globl relocate_code
163relocate_code:
164 mov r4, r0 /* save addr_sp */
165 mov r5, r1 /* save addr of gd */
166 mov r6, r2 /* save addr of destination */
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200167
168 /* Set up the stack */
169stack_setup:
170 mov sp, r4
171
172 adr r0, _start
Andreas Bießmanna1a47d32010-12-01 00:58:34 +0100173 cmp r0, r6
174 beq clear_bss /* skip relocation */
Andreas Bießmanna78fb682010-12-01 00:58:33 +0100175 mov r1, r6 /* r1 <- scratch for copy_loop */
Albert Aribaud3336ca62010-11-25 22:45:02 +0100176 ldr r3, _bss_start_ofs
177 add r2, r0, r3 /* r2 <- source end address */
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200178
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200179copy_loop:
180 ldmia r0!, {r9-r10} /* copy from source address [r0] */
Andreas Bießmanna78fb682010-12-01 00:58:33 +0100181 stmia r1!, {r9-r10} /* copy to target address [r1] */
Albert Aribaudda90d4c2010-10-05 16:06:39 +0200182 cmp r0, r2 /* until source end address [r2] */
183 blo copy_loop
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200184
185#ifndef CONFIG_PRELOADER
Albert Aribaud3336ca62010-11-25 22:45:02 +0100186 /*
187 * fix .rel.dyn relocations
188 */
189 ldr r0, _TEXT_BASE /* r0 <- Text base */
Andreas Bießmanna78fb682010-12-01 00:58:33 +0100190 sub r9, r6, r0 /* r9 <- relocation offset */
Albert Aribaud3336ca62010-11-25 22:45:02 +0100191 ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
192 add r10, r10, r0 /* r10 <- sym table in FLASH */
193 ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
194 add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
195 ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
196 add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200197fixloop:
Albert Aribaud3336ca62010-11-25 22:45:02 +0100198 ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
199 add r0, r0, r9 /* r0 <- location to fix up in RAM */
200 ldr r1, [r2, #4]
Andreas Bießmann1f52d892010-12-01 00:58:35 +0100201 and r7, r1, #0xff
202 cmp r7, #23 /* relative fixup? */
Albert Aribaud3336ca62010-11-25 22:45:02 +0100203 beq fixrel
Andreas Bießmann1f52d892010-12-01 00:58:35 +0100204 cmp r7, #2 /* absolute fixup? */
Albert Aribaud3336ca62010-11-25 22:45:02 +0100205 beq fixabs
206 /* ignore unknown type of fixup */
207 b fixnext
208fixabs:
209 /* absolute fix: set location to (offset) symbol value */
210 mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
211 add r1, r10, r1 /* r1 <- address of symbol in table */
212 ldr r1, [r1, #4] /* r1 <- symbol value */
Wolfgang Denk36009452010-12-09 11:26:24 +0100213 add r1, r1, r9 /* r1 <- relocated sym addr */
Albert Aribaud3336ca62010-11-25 22:45:02 +0100214 b fixnext
215fixrel:
216 /* relative fix: increase location by offset */
217 ldr r1, [r0]
218 add r1, r1, r9
219fixnext:
220 str r1, [r0]
221 add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200222 cmp r2, r3
Wolfgang Denk79e63132010-10-23 23:22:38 +0200223 blo fixloop
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200224#endif
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200225
226clear_bss:
227#ifndef CONFIG_PRELOADER
Albert Aribaud3336ca62010-11-25 22:45:02 +0100228 ldr r0, _bss_start_ofs
229 ldr r1, _bss_end_ofs
Andreas Bießmanna78fb682010-12-01 00:58:33 +0100230 mov r4, r6 /* reloc addr */
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200231 add r0, r0, r4
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200232 add r1, r1, r4
233 mov r2, #0x00000000 /* clear */
234
235clbss_l:str r2, [r0] /* clear loop... */
236 add r0, r0, #4
237 cmp r0, r1
Albert Aribaud3336ca62010-11-25 22:45:02 +0100238 blo clbss_l
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200239#endif
240
241/*
242 * We are done. Do not return, instead branch to second part of board
243 * initialization, now running from RAM.
244 */
245#ifdef CONFIG_NAND_SPL
246 ldr pc, _nand_boot
247
248_nand_boot: .word nand_boot
249#else
Albert Aribaud3336ca62010-11-25 22:45:02 +0100250 ldr r0, _board_init_r_ofs
251 adr r1, _start
252 add lr, r0, r1
253 add lr, lr, r9
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200254 /* setup parameters for board_init_r */
255 mov r0, r5 /* gd_t */
Andreas Bießmanna78fb682010-12-01 00:58:33 +0100256 mov r1, r6 /* dest_addr */
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200257 /* jump to it ... */
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200258 mov pc, lr
259
Albert Aribaud3336ca62010-11-25 22:45:02 +0100260_board_init_r_ofs:
261 .word board_init_r - _start
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200262#endif
263
Albert Aribaud3336ca62010-11-25 22:45:02 +0100264_rel_dyn_start_ofs:
265 .word __rel_dyn_start - _start
266_rel_dyn_end_ofs:
267 .word __rel_dyn_end - _start
268_dynsym_start_ofs:
269 .word __dynsym_start - _start
270
Wolfgang Denk74f43042005-09-25 01:48:28 +0200271/*
272 *************************************************************************
273 *
274 * CPU_init_critical registers
275 *
276 * setup important registers
277 * setup memory timing
278 *
279 *************************************************************************
280 */
281
282
Jean-Christophe PLAGNIOL-VILLARD8fc3bb42009-05-15 23:45:20 +0200283#ifndef CONFIG_SKIP_LOWLEVEL_INIT
Wolfgang Denk74f43042005-09-25 01:48:28 +0200284cpu_init_crit:
285 /*
286 * flush v4 I/D caches
287 */
288 mov r0, #0
289 mcr p15, 0, r0, c7, c5, 0 /* flush v4 I-cache */
290 mcr p15, 0, r0, c7, c6, 0 /* flush v4 D-cache */
291
292 /*
293 * disable MMU stuff and caches
294 */
295 mrc p15, 0, r0, c1, c0, 0
296 bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
297 bic r0, r0, #0x00000087 /* clear bits 7, 2:0 (B--- -CAM) */
298 orr r0, r0, #0x00000002 /* set bit 2 (A) Align */
299 orr r0, r0, #0x00001000 /* set bit 12 (I) I-Cache */
300 mcr p15, 0, r0, c1, c0, 0
301
302 /*
303 * Go setup Memory and board specific bits prior to relocation.
304 */
305 mov ip, lr /* perserve link reg across call */
Wolfgang Denk87cb6862005-10-06 17:08:18 +0200306 bl lowlevel_init /* go setup memory */
Wolfgang Denk74f43042005-09-25 01:48:28 +0200307 mov lr, ip /* restore link */
308 mov pc, lr /* back to my caller */
Jean-Christophe PLAGNIOL-VILLARD8fc3bb42009-05-15 23:45:20 +0200309#endif
Wolfgang Denk74f43042005-09-25 01:48:28 +0200310/*
311 *************************************************************************
312 *
313 * Interrupt handling
314 *
315 *************************************************************************
316 */
317
318@
319@ IRQ stack frame.
320@
321#define S_FRAME_SIZE 72
322
323#define S_OLD_R0 68
324#define S_PSR 64
325#define S_PC 60
326#define S_LR 56
327#define S_SP 52
328
329#define S_IP 48
330#define S_FP 44
331#define S_R10 40
332#define S_R9 36
333#define S_R8 32
334#define S_R7 28
335#define S_R6 24
336#define S_R5 20
337#define S_R4 16
338#define S_R3 12
339#define S_R2 8
340#define S_R1 4
341#define S_R0 0
342
343#define MODE_SVC 0x13
344#define I_BIT 0x80
345
346/*
347 * use bad_save_user_regs for abort/prefetch/undef/swi ...
348 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
349 */
350
351 .macro bad_save_user_regs
352 @ carve out a frame on current user stack
353 sub sp, sp, #S_FRAME_SIZE
354 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
355
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200356 ldr r2, IRQ_STACK_START_IN
Wolfgang Denk74f43042005-09-25 01:48:28 +0200357 @ get values for "aborted" pc and cpsr (into parm regs)
358 ldmia r2, {r2 - r3}
359 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
360 add r5, sp, #S_SP
361 mov r1, lr
362 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
363 mov r0, sp @ save current stack into r0 (param register)
364 .endm
365
366 .macro irq_save_user_regs
367 sub sp, sp, #S_FRAME_SIZE
368 stmia sp, {r0 - r12} @ Calling r0-r12
369 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
370 add r8, sp, #S_PC
371 stmdb r8, {sp, lr}^ @ Calling SP, LR
372 str lr, [r8, #0] @ Save calling PC
373 mrs r6, spsr
374 str r6, [r8, #4] @ Save CPSR
375 str r0, [r8, #8] @ Save OLD_R0
376 mov r0, sp
377 .endm
378
379 .macro irq_restore_user_regs
380 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
381 mov r0, r0
382 ldr lr, [sp, #S_PC] @ Get PC
383 add sp, sp, #S_FRAME_SIZE
384 subs pc, lr, #4 @ return & move spsr_svc into cpsr
385 .endm
386
387 .macro get_bad_stack
Heiko Schocher5a8a87e2010-09-17 13:10:45 +0200388 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
Wolfgang Denk74f43042005-09-25 01:48:28 +0200389
390 str lr, [r13] @ save caller lr in position 0 of saved stack
391 mrs lr, spsr @ get the spsr
392 str lr, [r13, #4] @ save spsr in position 1 of saved stack
393 mov r13, #MODE_SVC @ prepare SVC-Mode
394 @ msr spsr_c, r13
395 msr spsr, r13 @ switch modes, make sure moves will execute
396 mov lr, pc @ capture return pc
397 movs pc, lr @ jump to next instruction & switch modes.
398 .endm
399
400 .macro get_irq_stack @ setup IRQ stack
401 ldr sp, IRQ_STACK_START
402 .endm
403
404 .macro get_fiq_stack @ setup FIQ stack
405 ldr sp, FIQ_STACK_START
406 .endm
407
408/*
409 * exception handlers
410 */
411 .align 5
412undefined_instruction:
413 get_bad_stack
414 bad_save_user_regs
415 bl do_undefined_instruction
416
417 .align 5
418software_interrupt:
419 get_bad_stack
420 bad_save_user_regs
421 bl do_software_interrupt
422
423 .align 5
424prefetch_abort:
425 get_bad_stack
426 bad_save_user_regs
427 bl do_prefetch_abort
428
429 .align 5
430data_abort:
431 get_bad_stack
432 bad_save_user_regs
433 bl do_data_abort
434
435 .align 5
436not_used:
437 get_bad_stack
438 bad_save_user_regs
439 bl do_not_used
440
441#ifdef CONFIG_USE_IRQ
442
443 .align 5
444irq:
445 get_irq_stack
446 irq_save_user_regs
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200447 bl do_irq
Wolfgang Denk74f43042005-09-25 01:48:28 +0200448 irq_restore_user_regs
449
450 .align 5
451fiq:
452 get_fiq_stack
453 /* someone ought to write a more effiction fiq_save_user_regs */
454 irq_save_user_regs
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200455 bl do_fiq
Wolfgang Denk74f43042005-09-25 01:48:28 +0200456 irq_restore_user_regs
457
458#else
459
460 .align 5
461irq:
462 get_bad_stack
463 bad_save_user_regs
464 bl do_irq
465
466 .align 5
467fiq:
468 get_bad_stack
469 bad_save_user_regs
470 bl do_fiq
471
472#endif
473
474# ifdef CONFIG_INTEGRATOR
475
476 /* Satisfied by general board level routine */
477
478#else
479
480 .align 5
481.globl reset_cpu
482reset_cpu:
483
484 ldr r1, rstctl1 /* get clkm1 reset ctl */
485 mov r3, #0x0
486 strh r3, [r1] /* clear it */
487 mov r3, #0x8
488 strh r3, [r1] /* force dsp+arm reset */
489_loop_forever:
490 b _loop_forever
491
492rstctl1:
493 .word 0xfffece10
494
495#endif /* #ifdef CONFIG_INTEGRATOR */