wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 1 | /* |
Graeme Russ | fea2572 | 2011-04-13 19:43:28 +1000 | [diff] [blame] | 2 | * U-boot - x86 Startup Code |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 3 | * |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 4 | * (C) Copyright 2008-2011 |
| 5 | * Graeme Russ, <graeme.russ@gmail.com> |
| 6 | * |
| 7 | * (C) Copyright 2002 |
Albert ARIBAUD | fa82f87 | 2011-08-04 18:45:45 +0200 | [diff] [blame] | 8 | * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se> |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 9 | * |
| 10 | * See file CREDITS for list of people who contributed to this |
| 11 | * project. |
| 12 | * |
| 13 | * This program is free software; you can redistribute it and/or |
| 14 | * modify it under the terms of the GNU General Public License as |
| 15 | * published by the Free Software Foundation; either version 2 of |
| 16 | * the License, or (at your option) any later version. |
| 17 | * |
| 18 | * This program is distributed in the hope that it will be useful, |
| 19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 21 | * GNU General Public License for more details. |
| 22 | * |
| 23 | * You should have received a copy of the GNU General Public License |
| 24 | * along with this program; if not, write to the Free Software |
| 25 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 26 | * MA 02111-1307 USA |
| 27 | */ |
| 28 | |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 29 | #include <config.h> |
| 30 | #include <version.h> |
Graeme Russ | 161b358 | 2010-10-07 20:03:29 +1100 | [diff] [blame] | 31 | #include <asm/global_data.h> |
Graeme Russ | 109ad14 | 2011-12-31 10:24:36 +1100 | [diff] [blame] | 32 | #include <asm/processor.h> |
Graeme Russ | 0c24c9c | 2011-02-12 15:11:32 +1100 | [diff] [blame] | 33 | #include <asm/processor-flags.h> |
Graeme Russ | 311b1a2 | 2011-11-08 02:33:18 +0000 | [diff] [blame] | 34 | #include <generated/asm-offsets.h> |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 35 | |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 36 | .section .text |
| 37 | .code32 |
| 38 | .globl _start |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 39 | .type _start, @function |
Graeme Russ | fea2572 | 2011-04-13 19:43:28 +1000 | [diff] [blame] | 40 | .globl _x86boot_start |
| 41 | _x86boot_start: |
Graeme Russ | 077e195 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 42 | /* |
| 43 | * This is the fail safe 32-bit bootstrap entry point. The |
| 44 | * following code is not executed from a cold-reset (actually, a |
| 45 | * lot of it is, but from real-mode after cold reset. It is |
| 46 | * repeated here to put the board into a state as close to cold |
| 47 | * reset as necessary) |
| 48 | */ |
| 49 | cli |
| 50 | cld |
| 51 | |
Graeme Russ | 2f0e0cd | 2011-11-08 02:33:23 +0000 | [diff] [blame] | 52 | /* Turn off cache (this might require a 486-class CPU) */ |
Graeme Russ | 077e195 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 53 | movl %cr0, %eax |
Graeme Russ | 0c24c9c | 2011-02-12 15:11:32 +1100 | [diff] [blame] | 54 | orl $(X86_CR0_NW | X86_CR0_CD), %eax |
Graeme Russ | 077e195 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 55 | movl %eax, %cr0 |
| 56 | wbinvd |
| 57 | |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 58 | _start: |
Graeme Russ | 077e195 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 59 | /* This is the 32-bit cold-reset entry point */ |
| 60 | |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 61 | /* Load the segement registes to match the gdt loaded in start16.S */ |
Graeme Russ | 109ad14 | 2011-12-31 10:24:36 +1100 | [diff] [blame] | 62 | movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax |
Graeme Russ | 8ffb2e8 | 2010-10-07 20:03:21 +1100 | [diff] [blame] | 63 | movw %ax, %fs |
| 64 | movw %ax, %ds |
| 65 | movw %ax, %gs |
| 66 | movw %ax, %es |
| 67 | movw %ax, %ss |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 68 | |
Mike Williams | 1626308 | 2011-07-22 04:01:30 +0000 | [diff] [blame] | 69 | /* Clear the interrupt vectors */ |
Graeme Russ | 077e195 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 70 | lidt blank_idt_ptr |
| 71 | |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 72 | /* Early platform init (setup gpio, etc ) */ |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 73 | jmp early_board_init |
Graeme Russ | 88fa0a6 | 2010-10-07 20:03:27 +1100 | [diff] [blame] | 74 | .globl early_board_init_ret |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 75 | early_board_init_ret: |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 76 | |
Graeme Russ | ed4cba7 | 2011-02-12 15:11:52 +1100 | [diff] [blame] | 77 | /* Initialise Cache-As-RAM */ |
| 78 | jmp car_init |
| 79 | .globl car_init_ret |
| 80 | car_init_ret: |
| 81 | /* |
| 82 | * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM, |
| 83 | * or fully initialised SDRAM - we really don't care which) |
| 84 | * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack |
| 85 | */ |
| 86 | movl $CONFIG_SYS_INIT_SP_ADDR, %esp |
Graeme Russ | 4e33467 | 2011-02-12 15:11:33 +1100 | [diff] [blame] | 87 | |
Graeme Russ | 96cd664 | 2011-02-12 15:11:54 +1100 | [diff] [blame] | 88 | /* Set parameter to board_init_f() to boot flags */ |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 89 | xorl %eax, %eax |
| 90 | movw %bx, %ax |
Graeme Russ | 161b358 | 2010-10-07 20:03:29 +1100 | [diff] [blame] | 91 | |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 92 | /* Enter, U-boot! */ |
| 93 | call board_init_f |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 94 | |
| 95 | /* indicate (lack of) progress */ |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 96 | movw $0x85, %ax |
Graeme Russ | fb00290 | 2011-02-12 15:11:58 +1100 | [diff] [blame] | 97 | jmp die |
| 98 | |
| 99 | .globl relocate_code |
| 100 | .type relocate_code, @function |
| 101 | relocate_code: |
| 102 | /* |
| 103 | * SDRAM has been initialised, U-Boot code has been copied into |
| 104 | * RAM, BSS has been cleared and relocation adjustments have been |
| 105 | * made. It is now time to jump into the in-RAM copy of U-Boot |
| 106 | * |
| 107 | * %eax = Address of top of stack |
| 108 | * %edx = Address of Global Data |
| 109 | * %ecx = Base address of in-RAM copy of U-Boot |
| 110 | */ |
| 111 | |
| 112 | /* Setup stack in RAM */ |
| 113 | movl %eax, %esp |
| 114 | |
| 115 | /* Setup call address of in-RAM copy of board_init_r() */ |
| 116 | movl $board_init_r, %ebp |
Graeme Russ | 311b1a2 | 2011-11-08 02:33:18 +0000 | [diff] [blame] | 117 | addl (GENERATED_GD_RELOC_OFF)(%edx), %ebp |
Graeme Russ | fb00290 | 2011-02-12 15:11:58 +1100 | [diff] [blame] | 118 | |
| 119 | /* Setup parameters to board_init_r() */ |
| 120 | movl %edx, %eax |
| 121 | movl %ecx, %edx |
| 122 | |
| 123 | /* Jump to in-RAM copy of board_init_r() */ |
| 124 | call *%ebp |
| 125 | |
Graeme Russ | 2f0e0cd | 2011-11-08 02:33:23 +0000 | [diff] [blame] | 126 | die: |
| 127 | hlt |
wdenk | 2262cfe | 2002-11-18 00:14:45 +0000 | [diff] [blame] | 128 | jmp die |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 129 | hlt |
Graeme Russ | 077e195 | 2010-04-24 00:05:42 +1000 | [diff] [blame] | 130 | |
| 131 | blank_idt_ptr: |
| 132 | .word 0 /* limit */ |
| 133 | .long 0 /* base */ |
Graeme Russ | a206cc2 | 2011-11-08 02:33:19 +0000 | [diff] [blame] | 134 | |
| 135 | .p2align 2 /* force 4-byte alignment */ |
| 136 | |
| 137 | multiboot_header: |
| 138 | /* magic */ |
| 139 | .long 0x1BADB002 |
| 140 | /* flags */ |
| 141 | .long (1 << 16) |
| 142 | /* checksum */ |
| 143 | .long -0x1BADB002 - (1 << 16) |
| 144 | /* header addr */ |
| 145 | .long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE |
| 146 | /* load addr */ |
| 147 | .long CONFIG_SYS_TEXT_BASE |
| 148 | /* load end addr */ |
| 149 | .long 0 |
| 150 | /* bss end addr */ |
| 151 | .long 0 |
| 152 | /* entry addr */ |
| 153 | .long CONFIG_SYS_TEXT_BASE |