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Haavard Skinnemoen6b443942007-04-14 17:11:49 +02001/*
2 * Copyright (C) 2006 Atmel Corporation
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22#include <common.h>
23
24#include <asm/io.h>
25#include <asm/sdram.h>
Haavard Skinnemoend38da532008-01-23 17:20:14 +010026#include <asm/arch/clk.h>
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020027#include <asm/arch/gpio.h>
Haavard Skinnemoen44453b22008-04-30 14:19:28 +020028#include <asm/arch/hmatrix.h>
Haavard Skinnemoen1f36f732010-08-12 13:52:54 +070029#include <asm/arch/mmu.h>
Haavard Skinnemoenab0df362008-08-29 21:09:49 +020030#include <asm/arch/portmux.h>
Ben Warren89973f82008-08-31 22:22:04 -070031#include <netdev.h>
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020032
33DECLARE_GLOBAL_DATA_PTR;
34
Haavard Skinnemoen1f36f732010-08-12 13:52:54 +070035struct mmu_vm_range mmu_vmr_table[CONFIG_SYS_NR_VM_REGIONS] = {
36 {
37 .virt_pgno = CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT,
38 .nr_pages = CONFIG_SYS_FLASH_SIZE >> PAGE_SHIFT,
39 .phys = (CONFIG_SYS_FLASH_BASE >> PAGE_SHIFT)
40 | MMU_VMR_CACHE_NONE,
41 }, {
42 .virt_pgno = CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT,
43 .nr_pages = EBI_SDRAM_SIZE >> PAGE_SHIFT,
44 .phys = (CONFIG_SYS_SDRAM_BASE >> PAGE_SHIFT)
45 | MMU_VMR_CACHE_WRBACK,
46 },
47};
48
Haavard Skinnemoena23e2772008-05-19 11:36:28 +020049static const struct sdram_config sdram_config = {
50 .data_bits = SDRAM_DATA_16BIT,
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020051 .row_bits = 13,
52 .col_bits = 9,
53 .bank_bits = 2,
54 .cas = 3,
55 .twr = 2,
56 .trc = 7,
57 .trp = 2,
58 .trcd = 2,
59 .tras = 5,
60 .txsr = 5,
Haavard Skinnemoend38da532008-01-23 17:20:14 +010061 /* 7.81 us */
62 .refresh_period = (781 * (SDRAMC_BUS_HZ / 1000)) / 100000,
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020063};
64
65int board_early_init_f(void)
66{
Haavard Skinnemoen44453b22008-04-30 14:19:28 +020067 /* Enable SDRAM in the EBI mux */
68 hmatrix_slave_write(EBI, SFR, HMATRIX_BIT(EBI_SDRAM_ENABLE));
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020069
Haavard Skinnemoenab0df362008-08-29 21:09:49 +020070 portmux_enable_ebi(16, 23, 0, PORTMUX_DRIVE_HIGH);
71 portmux_enable_usart1(PORTMUX_DRIVE_MIN);
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020072
73#if defined(CONFIG_MACB)
Haavard Skinnemoenab0df362008-08-29 21:09:49 +020074 portmux_enable_macb0(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
75 portmux_enable_macb1(PORTMUX_MACB_MII, PORTMUX_DRIVE_HIGH);
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020076#endif
77#if defined(CONFIG_MMC)
Haavard Skinnemoenab0df362008-08-29 21:09:49 +020078 portmux_enable_mmci(0, PORTMUX_MMCI_4BIT, PORTMUX_DRIVE_LOW);
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020079#endif
Haavard Skinnemoen5f723a32008-06-20 10:41:05 +020080#if defined(CONFIG_ATMEL_SPI)
Haavard Skinnemoenab0df362008-08-29 21:09:49 +020081 portmux_enable_spi0(1 << 0, PORTMUX_DRIVE_LOW);
Haavard Skinnemoen5f723a32008-06-20 10:41:05 +020082#endif
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020083
84 return 0;
85}
86
Becky Bruce9973e3c2008-06-09 16:03:40 -050087phys_size_t initdram(int board_type)
Haavard Skinnemoen6b443942007-04-14 17:11:49 +020088{
Haavard Skinnemoena23e2772008-05-19 11:36:28 +020089 unsigned long expected_size;
90 unsigned long actual_size;
91 void *sdram_base;
92
Haavard Skinnemoen9cec2fc2010-08-12 13:52:53 +070093 sdram_base = uncached(EBI_SDRAM_BASE);
Haavard Skinnemoena23e2772008-05-19 11:36:28 +020094
95 expected_size = sdram_init(sdram_base, &sdram_config);
96 actual_size = get_ram_size(sdram_base, expected_size);
97
Haavard Skinnemoena23e2772008-05-19 11:36:28 +020098 if (expected_size != actual_size)
Haavard Skinnemoen7f4b0092008-07-23 10:55:15 +020099 printf("Warning: Only %lu of %lu MiB SDRAM is working\n",
Haavard Skinnemoena23e2772008-05-19 11:36:28 +0200100 actual_size >> 20, expected_size >> 20);
101
102 return actual_size;
Haavard Skinnemoen6b443942007-04-14 17:11:49 +0200103}
104
Haavard Skinnemoen25e68542008-08-31 18:46:35 +0200105int board_early_init_r(void)
Haavard Skinnemoen6b443942007-04-14 17:11:49 +0200106{
107 gd->bd->bi_phy_id[0] = 0x01;
108 gd->bd->bi_phy_id[1] = 0x03;
Haavard Skinnemoen25e68542008-08-31 18:46:35 +0200109 return 0;
Haavard Skinnemoen6b443942007-04-14 17:11:49 +0200110}
Haavard Skinnemoen5f723a32008-06-20 10:41:05 +0200111
Ben Warrenc8c845c2008-07-05 00:08:48 -0700112#ifdef CONFIG_CMD_NET
113int board_eth_init(bd_t *bi)
114{
115 macb_eth_initialize(0, (void *)MACB0_BASE, bi->bi_phy_id[0]);
116 macb_eth_initialize(1, (void *)MACB1_BASE, bi->bi_phy_id[1]);
117 return 0;
118}
119#endif
120
Haavard Skinnemoen5f723a32008-06-20 10:41:05 +0200121/* SPI chip select control */
122#ifdef CONFIG_ATMEL_SPI
123#include <spi.h>
124
Haavard Skinnemoenab0df362008-08-29 21:09:49 +0200125#define ATNGW100_DATAFLASH_CS_PIN GPIO_PIN_PA(3)
Haavard Skinnemoen5f723a32008-06-20 10:41:05 +0200126
127int spi_cs_is_valid(unsigned int bus, unsigned int cs)
128{
129 return bus == 0 && cs == 0;
130}
131
132void spi_cs_activate(struct spi_slave *slave)
133{
134 gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 0);
135}
136
137void spi_cs_deactivate(struct spi_slave *slave)
138{
139 gpio_set_value(ATNGW100_DATAFLASH_CS_PIN, 1);
140}
141#endif /* CONFIG_ATMEL_SPI */