blob: ec82fa664e100a10ae14d04077821506a95281d8 [file] [log] [blame]
Vivek Gautam5853e132013-09-14 14:02:45 +05301/*
2 * USB HOST XHCI Controller stack
3 *
4 * Based on xHCI host controller driver in linux-kernel
5 * by Sarah Sharp.
6 *
7 * Copyright (C) 2008 Intel Corp.
8 * Author: Sarah Sharp
9 *
10 * Copyright (C) 2013 Samsung Electronics Co.Ltd
11 * Authors: Vivek Gautam <gautam.vivek@samsung.com>
12 * Vikas Sajjan <vikas.sajjan@samsung.com>
13 *
14 * SPDX-License-Identifier: GPL-2.0+
15 */
16
17/**
18 * This file gives the xhci stack for usb3.0 looking into
19 * xhci specification Rev1.0 (5/21/10).
20 * The quirk devices support hasn't been given yet.
21 */
22
23#include <common.h>
Simon Glassa5762fe2015-03-25 12:22:53 -060024#include <dm.h>
Vivek Gautam5853e132013-09-14 14:02:45 +053025#include <asm/byteorder.h>
26#include <usb.h>
27#include <malloc.h>
28#include <watchdog.h>
29#include <asm/cache.h>
30#include <asm/unaligned.h>
Masahiro Yamada5d97dff2016-09-21 11:28:57 +090031#include <linux/errno.h>
Vivek Gautam5853e132013-09-14 14:02:45 +053032#include "xhci.h"
33
34#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
35#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
36#endif
37
38static struct descriptor {
39 struct usb_hub_descriptor hub;
40 struct usb_device_descriptor device;
41 struct usb_config_descriptor config;
42 struct usb_interface_descriptor interface;
43 struct usb_endpoint_descriptor endpoint;
44 struct usb_ss_ep_comp_descriptor ep_companion;
45} __attribute__ ((packed)) descriptor = {
46 {
47 0xc, /* bDescLength */
48 0x2a, /* bDescriptorType: hub descriptor */
49 2, /* bNrPorts -- runtime modified */
50 cpu_to_le16(0x8), /* wHubCharacteristics */
51 10, /* bPwrOn2PwrGood */
52 0, /* bHubCntrCurrent */
Bin Meng337fc7e2017-07-19 21:50:00 +080053 { /* Device removable */
54 } /* at most 7 ports! XXX */
Vivek Gautam5853e132013-09-14 14:02:45 +053055 },
56 {
57 0x12, /* bLength */
58 1, /* bDescriptorType: UDESC_DEVICE */
59 cpu_to_le16(0x0300), /* bcdUSB: v3.0 */
60 9, /* bDeviceClass: UDCLASS_HUB */
61 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
62 3, /* bDeviceProtocol: UDPROTO_SSHUBSTT */
63 9, /* bMaxPacketSize: 512 bytes 2^9 */
64 0x0000, /* idVendor */
65 0x0000, /* idProduct */
66 cpu_to_le16(0x0100), /* bcdDevice */
67 1, /* iManufacturer */
68 2, /* iProduct */
69 0, /* iSerialNumber */
70 1 /* bNumConfigurations: 1 */
71 },
72 {
73 0x9,
74 2, /* bDescriptorType: UDESC_CONFIG */
75 cpu_to_le16(0x1f), /* includes SS endpoint descriptor */
76 1, /* bNumInterface */
77 1, /* bConfigurationValue */
78 0, /* iConfiguration */
79 0x40, /* bmAttributes: UC_SELF_POWER */
80 0 /* bMaxPower */
81 },
82 {
83 0x9, /* bLength */
84 4, /* bDescriptorType: UDESC_INTERFACE */
85 0, /* bInterfaceNumber */
86 0, /* bAlternateSetting */
87 1, /* bNumEndpoints */
88 9, /* bInterfaceClass: UICLASS_HUB */
89 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
90 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
91 0 /* iInterface */
92 },
93 {
94 0x7, /* bLength */
95 5, /* bDescriptorType: UDESC_ENDPOINT */
96 0x81, /* bEndpointAddress: IN endpoint 1 */
97 3, /* bmAttributes: UE_INTERRUPT */
98 8, /* wMaxPacketSize */
99 255 /* bInterval */
100 },
101 {
102 0x06, /* ss_bLength */
103 0x30, /* ss_bDescriptorType: SS EP Companion */
104 0x00, /* ss_bMaxBurst: allows 1 TX between ACKs */
105 /* ss_bmAttributes: 1 packet per service interval */
106 0x00,
107 /* ss_wBytesPerInterval: 15 bits for max 15 ports */
108 cpu_to_le16(0x02),
109 },
110};
111
Simon Glassa5762fe2015-03-25 12:22:53 -0600112#ifndef CONFIG_DM_USB
Vivek Gautam5853e132013-09-14 14:02:45 +0530113static struct xhci_ctrl xhcic[CONFIG_USB_MAX_CONTROLLER_COUNT];
Simon Glassa5762fe2015-03-25 12:22:53 -0600114#endif
Vivek Gautam5853e132013-09-14 14:02:45 +0530115
Simon Glass7c1deec2015-03-25 12:22:49 -0600116struct xhci_ctrl *xhci_get_ctrl(struct usb_device *udev)
117{
Simon Glassa5762fe2015-03-25 12:22:53 -0600118#ifdef CONFIG_DM_USB
119 struct udevice *dev;
120
121 /* Find the USB controller */
122 for (dev = udev->dev;
123 device_get_uclass_id(dev) != UCLASS_USB;
124 dev = dev->parent)
125 ;
126 return dev_get_priv(dev);
127#else
Simon Glass7c1deec2015-03-25 12:22:49 -0600128 return udev->controller;
Simon Glassa5762fe2015-03-25 12:22:53 -0600129#endif
Simon Glass7c1deec2015-03-25 12:22:49 -0600130}
131
Vivek Gautam5853e132013-09-14 14:02:45 +0530132/**
133 * Waits for as per specified amount of time
134 * for the "result" to match with "done"
135 *
136 * @param ptr pointer to the register to be read
137 * @param mask mask for the value read
138 * @param done value to be campared with result
139 * @param usec time to wait till
140 * @return 0 if handshake is success else < 0 on failure
141 */
142static int handshake(uint32_t volatile *ptr, uint32_t mask,
143 uint32_t done, int usec)
144{
145 uint32_t result;
146
147 do {
148 result = xhci_readl(ptr);
149 if (result == ~(uint32_t)0)
150 return -ENODEV;
151 result &= mask;
152 if (result == done)
153 return 0;
154 usec--;
155 udelay(1);
156 } while (usec > 0);
157
158 return -ETIMEDOUT;
159}
160
161/**
162 * Set the run bit and wait for the host to be running.
163 *
164 * @param hcor pointer to host controller operation registers
165 * @return status of the Handshake
166 */
167static int xhci_start(struct xhci_hcor *hcor)
168{
169 u32 temp;
170 int ret;
171
172 puts("Starting the controller\n");
173 temp = xhci_readl(&hcor->or_usbcmd);
174 temp |= (CMD_RUN);
175 xhci_writel(&hcor->or_usbcmd, temp);
176
177 /*
178 * Wait for the HCHalted Status bit to be 0 to indicate the host is
179 * running.
180 */
181 ret = handshake(&hcor->or_usbsts, STS_HALT, 0, XHCI_MAX_HALT_USEC);
182 if (ret)
183 debug("Host took too long to start, "
184 "waited %u microseconds.\n",
185 XHCI_MAX_HALT_USEC);
186 return ret;
187}
188
189/**
190 * Resets the XHCI Controller
191 *
192 * @param hcor pointer to host controller operation registers
193 * @return -EBUSY if XHCI Controller is not halted else status of handshake
194 */
Masahiro Yamada121a4d12017-06-22 16:35:14 +0900195static int xhci_reset(struct xhci_hcor *hcor)
Vivek Gautam5853e132013-09-14 14:02:45 +0530196{
197 u32 cmd;
198 u32 state;
199 int ret;
200
201 /* Halting the Host first */
Sergey Temerkhanova5ccda42015-08-17 15:38:07 +0300202 debug("// Halt the HC: %p\n", hcor);
Vivek Gautam5853e132013-09-14 14:02:45 +0530203 state = xhci_readl(&hcor->or_usbsts) & STS_HALT;
204 if (!state) {
205 cmd = xhci_readl(&hcor->or_usbcmd);
206 cmd &= ~CMD_RUN;
207 xhci_writel(&hcor->or_usbcmd, cmd);
208 }
209
210 ret = handshake(&hcor->or_usbsts,
211 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
212 if (ret) {
213 printf("Host not halted after %u microseconds.\n",
214 XHCI_MAX_HALT_USEC);
215 return -EBUSY;
216 }
217
218 debug("// Reset the HC\n");
219 cmd = xhci_readl(&hcor->or_usbcmd);
220 cmd |= CMD_RESET;
221 xhci_writel(&hcor->or_usbcmd, cmd);
222
223 ret = handshake(&hcor->or_usbcmd, CMD_RESET, 0, XHCI_MAX_RESET_USEC);
224 if (ret)
225 return ret;
226
227 /*
228 * xHCI cannot write to any doorbells or operational registers other
229 * than status until the "Controller Not Ready" flag is cleared.
230 */
231 return handshake(&hcor->or_usbsts, STS_CNR, 0, XHCI_MAX_RESET_USEC);
232}
233
234/**
235 * Used for passing endpoint bitmasks between the core and HCDs.
236 * Find the index for an endpoint given its descriptor.
237 * Use the return value to right shift 1 for the bitmask.
238 *
239 * Index = (epnum * 2) + direction - 1,
240 * where direction = 0 for OUT, 1 for IN.
241 * For control endpoints, the IN index is used (OUT index is unused), so
242 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
243 *
244 * @param desc USB enpdoint Descriptor
245 * @return index of the Endpoint
246 */
247static unsigned int xhci_get_ep_index(struct usb_endpoint_descriptor *desc)
248{
249 unsigned int index;
250
251 if (usb_endpoint_xfer_control(desc))
252 index = (unsigned int)(usb_endpoint_num(desc) * 2);
253 else
254 index = (unsigned int)((usb_endpoint_num(desc) * 2) -
255 (usb_endpoint_dir_in(desc) ? 0 : 1));
256
257 return index;
258}
259
260/**
261 * Issue a configure endpoint command or evaluate context command
262 * and wait for it to finish.
263 *
264 * @param udev pointer to the Device Data Structure
265 * @param ctx_change flag to indicate the Context has changed or NOT
266 * @return 0 on success, -1 on failure
267 */
268static int xhci_configure_endpoints(struct usb_device *udev, bool ctx_change)
269{
270 struct xhci_container_ctx *in_ctx;
271 struct xhci_virt_device *virt_dev;
Simon Glass7c1deec2015-03-25 12:22:49 -0600272 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
Vivek Gautam5853e132013-09-14 14:02:45 +0530273 union xhci_trb *event;
274
275 virt_dev = ctrl->devs[udev->slot_id];
276 in_ctx = virt_dev->in_ctx;
277
Sergey Temerkhanov421a5a02015-04-01 17:18:45 +0300278 xhci_flush_cache((uintptr_t)in_ctx->bytes, in_ctx->size);
Vivek Gautam5853e132013-09-14 14:02:45 +0530279 xhci_queue_command(ctrl, in_ctx->bytes, udev->slot_id, 0,
280 ctx_change ? TRB_EVAL_CONTEXT : TRB_CONFIG_EP);
281 event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
282 BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags))
283 != udev->slot_id);
284
285 switch (GET_COMP_CODE(le32_to_cpu(event->event_cmd.status))) {
286 case COMP_SUCCESS:
287 debug("Successful %s command\n",
288 ctx_change ? "Evaluate Context" : "Configure Endpoint");
289 break;
290 default:
291 printf("ERROR: %s command returned completion code %d.\n",
292 ctx_change ? "Evaluate Context" : "Configure Endpoint",
293 GET_COMP_CODE(le32_to_cpu(event->event_cmd.status)));
294 return -EINVAL;
295 }
296
297 xhci_acknowledge_event(ctrl);
298
299 return 0;
300}
301
302/**
303 * Configure the endpoint, programming the device contexts.
304 *
305 * @param udev pointer to the USB device structure
306 * @return returns the status of the xhci_configure_endpoints
307 */
308static int xhci_set_configuration(struct usb_device *udev)
309{
310 struct xhci_container_ctx *in_ctx;
311 struct xhci_container_ctx *out_ctx;
312 struct xhci_input_control_ctx *ctrl_ctx;
313 struct xhci_slot_ctx *slot_ctx;
314 struct xhci_ep_ctx *ep_ctx[MAX_EP_CTX_NUM];
315 int cur_ep;
316 int max_ep_flag = 0;
317 int ep_index;
318 unsigned int dir;
319 unsigned int ep_type;
Simon Glass7c1deec2015-03-25 12:22:49 -0600320 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
Vivek Gautam5853e132013-09-14 14:02:45 +0530321 int num_of_ep;
322 int ep_flag = 0;
323 u64 trb_64 = 0;
324 int slot_id = udev->slot_id;
325 struct xhci_virt_device *virt_dev = ctrl->devs[slot_id];
326 struct usb_interface *ifdesc;
327
328 out_ctx = virt_dev->out_ctx;
329 in_ctx = virt_dev->in_ctx;
330
331 num_of_ep = udev->config.if_desc[0].no_of_ep;
332 ifdesc = &udev->config.if_desc[0];
333
334 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
Bin Mengaab0db02017-07-19 21:49:56 +0800335 /* Initialize the input context control */
336 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
Vivek Gautam5853e132013-09-14 14:02:45 +0530337 ctrl_ctx->drop_flags = 0;
338
339 /* EP_FLAG gives values 1 & 4 for EP1OUT and EP2IN */
340 for (cur_ep = 0; cur_ep < num_of_ep; cur_ep++) {
341 ep_flag = xhci_get_ep_index(&ifdesc->ep_desc[cur_ep]);
342 ctrl_ctx->add_flags |= cpu_to_le32(1 << (ep_flag + 1));
343 if (max_ep_flag < ep_flag)
344 max_ep_flag = ep_flag;
345 }
346
Sergey Temerkhanov421a5a02015-04-01 17:18:45 +0300347 xhci_inval_cache((uintptr_t)out_ctx->bytes, out_ctx->size);
Vivek Gautam5853e132013-09-14 14:02:45 +0530348
349 /* slot context */
350 xhci_slot_copy(ctrl, in_ctx, out_ctx);
351 slot_ctx = xhci_get_slot_ctx(ctrl, in_ctx);
352 slot_ctx->dev_info &= ~(LAST_CTX_MASK);
353 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(max_ep_flag + 1) | 0);
354
355 xhci_endpoint_copy(ctrl, in_ctx, out_ctx, 0);
356
357 /* filling up ep contexts */
358 for (cur_ep = 0; cur_ep < num_of_ep; cur_ep++) {
359 struct usb_endpoint_descriptor *endpt_desc = NULL;
360
361 endpt_desc = &ifdesc->ep_desc[cur_ep];
362 trb_64 = 0;
363
364 ep_index = xhci_get_ep_index(endpt_desc);
365 ep_ctx[ep_index] = xhci_get_ep_ctx(ctrl, in_ctx, ep_index);
366
367 /* Allocate the ep rings */
368 virt_dev->eps[ep_index].ring = xhci_ring_alloc(1, true);
369 if (!virt_dev->eps[ep_index].ring)
370 return -ENOMEM;
371
372 /*NOTE: ep_desc[0] actually represents EP1 and so on */
373 dir = (((endpt_desc->bEndpointAddress) & (0x80)) >> 7);
374 ep_type = (((endpt_desc->bmAttributes) & (0x3)) | (dir << 2));
375 ep_ctx[ep_index]->ep_info2 =
376 cpu_to_le32(ep_type << EP_TYPE_SHIFT);
377 ep_ctx[ep_index]->ep_info2 |=
378 cpu_to_le32(MAX_PACKET
379 (get_unaligned(&endpt_desc->wMaxPacketSize)));
380
381 ep_ctx[ep_index]->ep_info2 |=
382 cpu_to_le32(((0 & MAX_BURST_MASK) << MAX_BURST_SHIFT) |
383 ((3 & ERROR_COUNT_MASK) << ERROR_COUNT_SHIFT));
384
385 trb_64 = (uintptr_t)
386 virt_dev->eps[ep_index].ring->enqueue;
387 ep_ctx[ep_index]->deq = cpu_to_le64(trb_64 |
388 virt_dev->eps[ep_index].ring->cycle_state);
389 }
390
391 return xhci_configure_endpoints(udev, false);
392}
393
394/**
395 * Issue an Address Device command (which will issue a SetAddress request to
396 * the device).
397 *
398 * @param udev pointer to the Device Data Structure
399 * @return 0 if successful else error code on failure
400 */
Simon Glass5dd75e32015-03-25 12:22:51 -0600401static int xhci_address_device(struct usb_device *udev, int root_portnr)
Vivek Gautam5853e132013-09-14 14:02:45 +0530402{
403 int ret = 0;
Simon Glass7c1deec2015-03-25 12:22:49 -0600404 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
Vivek Gautam5853e132013-09-14 14:02:45 +0530405 struct xhci_slot_ctx *slot_ctx;
406 struct xhci_input_control_ctx *ctrl_ctx;
407 struct xhci_virt_device *virt_dev;
408 int slot_id = udev->slot_id;
409 union xhci_trb *event;
410
411 virt_dev = ctrl->devs[slot_id];
412
413 /*
414 * This is the first Set Address since device plug-in
415 * so setting up the slot context.
416 */
Simon Glass5dd75e32015-03-25 12:22:51 -0600417 debug("Setting up addressable devices %p\n", ctrl->dcbaa);
Bin Mengdaec4692017-07-19 21:51:14 +0800418 xhci_setup_addressable_virt_dev(ctrl, udev, root_portnr);
Vivek Gautam5853e132013-09-14 14:02:45 +0530419
420 ctrl_ctx = xhci_get_input_control_ctx(virt_dev->in_ctx);
421 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
422 ctrl_ctx->drop_flags = 0;
423
424 xhci_queue_command(ctrl, (void *)ctrl_ctx, slot_id, 0, TRB_ADDR_DEV);
425 event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
426 BUG_ON(TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags)) != slot_id);
427
428 switch (GET_COMP_CODE(le32_to_cpu(event->event_cmd.status))) {
429 case COMP_CTX_STATE:
430 case COMP_EBADSLT:
431 printf("Setup ERROR: address device command for slot %d.\n",
432 slot_id);
433 ret = -EINVAL;
434 break;
435 case COMP_TX_ERR:
436 puts("Device not responding to set address.\n");
437 ret = -EPROTO;
438 break;
439 case COMP_DEV_ERR:
440 puts("ERROR: Incompatible device"
441 "for address device command.\n");
442 ret = -ENODEV;
443 break;
444 case COMP_SUCCESS:
445 debug("Successful Address Device command\n");
446 udev->status = 0;
447 break;
448 default:
449 printf("ERROR: unexpected command completion code 0x%x.\n",
450 GET_COMP_CODE(le32_to_cpu(event->event_cmd.status)));
451 ret = -EINVAL;
452 break;
453 }
454
455 xhci_acknowledge_event(ctrl);
456
457 if (ret < 0)
458 /*
459 * TODO: Unsuccessful Address Device command shall leave the
460 * slot in default state. So, issue Disable Slot command now.
461 */
462 return ret;
463
Sergey Temerkhanov421a5a02015-04-01 17:18:45 +0300464 xhci_inval_cache((uintptr_t)virt_dev->out_ctx->bytes,
465 virt_dev->out_ctx->size);
Vivek Gautam5853e132013-09-14 14:02:45 +0530466 slot_ctx = xhci_get_slot_ctx(ctrl, virt_dev->out_ctx);
467
468 debug("xHC internal address is: %d\n",
469 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
470
471 return 0;
472}
473
474/**
475 * Issue Enable slot command to the controller to allocate
476 * device slot and assign the slot id. It fails if the xHC
477 * ran out of device slots, the Enable Slot command timed out,
478 * or allocating memory failed.
479 *
480 * @param udev pointer to the Device Data Structure
481 * @return Returns 0 on succes else return error code on failure
482 */
Masahiro Yamada121a4d12017-06-22 16:35:14 +0900483static int _xhci_alloc_device(struct usb_device *udev)
Vivek Gautam5853e132013-09-14 14:02:45 +0530484{
Simon Glass7c1deec2015-03-25 12:22:49 -0600485 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
Vivek Gautam5853e132013-09-14 14:02:45 +0530486 union xhci_trb *event;
Vivek Gautam5853e132013-09-14 14:02:45 +0530487 int ret;
488
489 /*
490 * Root hub will be first device to be initailized.
491 * If this device is root-hub, don't do any xHC related
492 * stuff.
493 */
494 if (ctrl->rootdev == 0) {
495 udev->speed = USB_SPEED_SUPER;
496 return 0;
497 }
498
499 xhci_queue_command(ctrl, NULL, 0, 0, TRB_ENABLE_SLOT);
500 event = xhci_wait_for_event(ctrl, TRB_COMPLETION);
501 BUG_ON(GET_COMP_CODE(le32_to_cpu(event->event_cmd.status))
502 != COMP_SUCCESS);
503
504 udev->slot_id = TRB_TO_SLOT_ID(le32_to_cpu(event->event_cmd.flags));
505
506 xhci_acknowledge_event(ctrl);
507
Simon Glass7e0c5ee2015-03-25 12:22:50 -0600508 ret = xhci_alloc_virt_device(ctrl, udev->slot_id);
Vivek Gautam5853e132013-09-14 14:02:45 +0530509 if (ret < 0) {
510 /*
511 * TODO: Unsuccessful Address Device command shall leave
512 * the slot in default. So, issue Disable Slot command now.
513 */
514 puts("Could not allocate xHCI USB device data structures\n");
515 return ret;
516 }
517
518 return 0;
519}
520
Simon Glassa5762fe2015-03-25 12:22:53 -0600521#ifndef CONFIG_DM_USB
522int usb_alloc_device(struct usb_device *udev)
523{
524 return _xhci_alloc_device(udev);
525}
526#endif
527
Vivek Gautam5853e132013-09-14 14:02:45 +0530528/*
529 * Full speed devices may have a max packet size greater than 8 bytes, but the
530 * USB core doesn't know that until it reads the first 8 bytes of the
531 * descriptor. If the usb_device's max packet size changes after that point,
532 * we need to issue an evaluate context command and wait on it.
533 *
534 * @param udev pointer to the Device Data Structure
535 * @return returns the status of the xhci_configure_endpoints
536 */
537int xhci_check_maxpacket(struct usb_device *udev)
538{
Simon Glass7c1deec2015-03-25 12:22:49 -0600539 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
Vivek Gautam5853e132013-09-14 14:02:45 +0530540 unsigned int slot_id = udev->slot_id;
541 int ep_index = 0; /* control endpoint */
542 struct xhci_container_ctx *in_ctx;
543 struct xhci_container_ctx *out_ctx;
544 struct xhci_input_control_ctx *ctrl_ctx;
545 struct xhci_ep_ctx *ep_ctx;
546 int max_packet_size;
547 int hw_max_packet_size;
548 int ret = 0;
Vivek Gautam5853e132013-09-14 14:02:45 +0530549
550 out_ctx = ctrl->devs[slot_id]->out_ctx;
Sergey Temerkhanov421a5a02015-04-01 17:18:45 +0300551 xhci_inval_cache((uintptr_t)out_ctx->bytes, out_ctx->size);
Vivek Gautam5853e132013-09-14 14:02:45 +0530552
553 ep_ctx = xhci_get_ep_ctx(ctrl, out_ctx, ep_index);
554 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
Bin Mengb5aa8572017-09-18 06:40:44 -0700555 max_packet_size = udev->epmaxpacketin[0];
Vivek Gautam5853e132013-09-14 14:02:45 +0530556 if (hw_max_packet_size != max_packet_size) {
557 debug("Max Packet Size for ep 0 changed.\n");
558 debug("Max packet size in usb_device = %d\n", max_packet_size);
559 debug("Max packet size in xHCI HW = %d\n", hw_max_packet_size);
560 debug("Issuing evaluate context command.\n");
561
562 /* Set up the modified control endpoint 0 */
563 xhci_endpoint_copy(ctrl, ctrl->devs[slot_id]->in_ctx,
564 ctrl->devs[slot_id]->out_ctx, ep_index);
565 in_ctx = ctrl->devs[slot_id]->in_ctx;
566 ep_ctx = xhci_get_ep_ctx(ctrl, in_ctx, ep_index);
Bin Mengb5aa8572017-09-18 06:40:44 -0700567 ep_ctx->ep_info2 &= cpu_to_le32(~((0xffff & MAX_PACKET_MASK)
568 << MAX_PACKET_SHIFT));
Vivek Gautam5853e132013-09-14 14:02:45 +0530569 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
570
571 /*
572 * Set up the input context flags for the command
573 * FIXME: This won't work if a non-default control endpoint
574 * changes max packet sizes.
575 */
576 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
577 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
578 ctrl_ctx->drop_flags = 0;
579
580 ret = xhci_configure_endpoints(udev, true);
581 }
582 return ret;
583}
584
585/**
586 * Clears the Change bits of the Port Status Register
587 *
588 * @param wValue request value
589 * @param wIndex request index
590 * @param addr address of posrt status register
591 * @param port_status state of port status register
592 * @return none
593 */
594static void xhci_clear_port_change_bit(u16 wValue,
595 u16 wIndex, volatile uint32_t *addr, u32 port_status)
596{
597 char *port_change_bit;
598 u32 status;
599
600 switch (wValue) {
601 case USB_PORT_FEAT_C_RESET:
602 status = PORT_RC;
603 port_change_bit = "reset";
604 break;
605 case USB_PORT_FEAT_C_CONNECTION:
606 status = PORT_CSC;
607 port_change_bit = "connect";
608 break;
609 case USB_PORT_FEAT_C_OVER_CURRENT:
610 status = PORT_OCC;
611 port_change_bit = "over-current";
612 break;
613 case USB_PORT_FEAT_C_ENABLE:
614 status = PORT_PEC;
615 port_change_bit = "enable/disable";
616 break;
617 case USB_PORT_FEAT_C_SUSPEND:
618 status = PORT_PLC;
619 port_change_bit = "suspend/resume";
620 break;
621 default:
622 /* Should never happen */
623 return;
624 }
625
626 /* Change bits are all write 1 to clear */
627 xhci_writel(addr, port_status | status);
628
629 port_status = xhci_readl(addr);
630 debug("clear port %s change, actual port %d status = 0x%x\n",
631 port_change_bit, wIndex, port_status);
632}
633
634/**
635 * Save Read Only (RO) bits and save read/write bits where
636 * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
637 * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
638 *
639 * @param state state of the Port Status and Control Regsiter
640 * @return a value that would result in the port being in the
641 * same state, if the value was written to the port
642 * status control register.
643 */
644static u32 xhci_port_state_to_neutral(u32 state)
645{
646 /* Save read-only status and port state */
647 return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
648}
649
650/**
651 * Submits the Requests to the XHCI Host Controller
652 *
653 * @param udev pointer to the USB device structure
654 * @param pipe contains the DIR_IN or OUT , devnum
655 * @param buffer buffer to be read/written based on the request
656 * @return returns 0 if successful else -1 on failure
657 */
658static int xhci_submit_root(struct usb_device *udev, unsigned long pipe,
659 void *buffer, struct devrequest *req)
660{
661 uint8_t tmpbuf[4];
662 u16 typeReq;
663 void *srcptr = NULL;
664 int len, srclen;
665 uint32_t reg;
666 volatile uint32_t *status_reg;
Simon Glass7c1deec2015-03-25 12:22:49 -0600667 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
Bin Meng72746712017-07-19 21:50:03 +0800668 struct xhci_hccr *hccr = ctrl->hccr;
Vivek Gautam5853e132013-09-14 14:02:45 +0530669 struct xhci_hcor *hcor = ctrl->hcor;
Bin Meng72746712017-07-19 21:50:03 +0800670 int max_ports = HCS_MAX_PORTS(xhci_readl(&hccr->cr_hcsparams1));
Vivek Gautam5853e132013-09-14 14:02:45 +0530671
Jeroen Hofstee25d19362014-06-12 00:31:27 +0200672 if ((req->requesttype & USB_RT_PORT) &&
Bin Meng72746712017-07-19 21:50:03 +0800673 le16_to_cpu(req->index) > max_ports) {
674 printf("The request port(%d) exceeds maximum port number\n",
675 le16_to_cpu(req->index) - 1);
Vivek Gautam5853e132013-09-14 14:02:45 +0530676 return -EINVAL;
677 }
678
679 status_reg = (volatile uint32_t *)
680 (&hcor->portregs[le16_to_cpu(req->index) - 1].or_portsc);
681 srclen = 0;
682
683 typeReq = req->request | req->requesttype << 8;
684
685 switch (typeReq) {
686 case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
687 switch (le16_to_cpu(req->value) >> 8) {
688 case USB_DT_DEVICE:
689 debug("USB_DT_DEVICE request\n");
690 srcptr = &descriptor.device;
691 srclen = 0x12;
692 break;
693 case USB_DT_CONFIG:
694 debug("USB_DT_CONFIG config\n");
695 srcptr = &descriptor.config;
696 srclen = 0x19;
697 break;
698 case USB_DT_STRING:
699 debug("USB_DT_STRING config\n");
700 switch (le16_to_cpu(req->value) & 0xff) {
701 case 0: /* Language */
702 srcptr = "\4\3\11\4";
703 srclen = 4;
704 break;
705 case 1: /* Vendor String */
Simon Glassf161c172015-03-25 12:22:54 -0600706 srcptr = "\16\3U\0-\0B\0o\0o\0t\0";
Vivek Gautam5853e132013-09-14 14:02:45 +0530707 srclen = 14;
708 break;
709 case 2: /* Product Name */
710 srcptr = "\52\3X\0H\0C\0I\0 "
711 "\0H\0o\0s\0t\0 "
712 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
713 srclen = 42;
714 break;
715 default:
716 printf("unknown value DT_STRING %x\n",
717 le16_to_cpu(req->value));
718 goto unknown;
719 }
720 break;
721 default:
722 printf("unknown value %x\n", le16_to_cpu(req->value));
723 goto unknown;
724 }
725 break;
726 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
727 switch (le16_to_cpu(req->value) >> 8) {
728 case USB_DT_HUB:
Bin Mengf3421192017-07-19 21:49:58 +0800729 case USB_DT_SS_HUB:
Vivek Gautam5853e132013-09-14 14:02:45 +0530730 debug("USB_DT_HUB config\n");
731 srcptr = &descriptor.hub;
732 srclen = 0x8;
733 break;
734 default:
735 printf("unknown value %x\n", le16_to_cpu(req->value));
736 goto unknown;
737 }
738 break;
739 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
740 debug("USB_REQ_SET_ADDRESS\n");
741 ctrl->rootdev = le16_to_cpu(req->value);
742 break;
743 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
744 /* Do nothing */
745 break;
746 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
747 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
748 tmpbuf[1] = 0;
749 srcptr = tmpbuf;
750 srclen = 2;
751 break;
752 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
753 memset(tmpbuf, 0, 4);
754 reg = xhci_readl(status_reg);
755 if (reg & PORT_CONNECT) {
756 tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
757 switch (reg & DEV_SPEED_MASK) {
758 case XDEV_FS:
759 debug("SPEED = FULLSPEED\n");
760 break;
761 case XDEV_LS:
762 debug("SPEED = LOWSPEED\n");
763 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
764 break;
765 case XDEV_HS:
766 debug("SPEED = HIGHSPEED\n");
767 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
768 break;
769 case XDEV_SS:
770 debug("SPEED = SUPERSPEED\n");
771 tmpbuf[1] |= USB_PORT_STAT_SUPER_SPEED >> 8;
772 break;
773 }
774 }
775 if (reg & PORT_PE)
776 tmpbuf[0] |= USB_PORT_STAT_ENABLE;
777 if ((reg & PORT_PLS_MASK) == XDEV_U3)
778 tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
779 if (reg & PORT_OC)
780 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
781 if (reg & PORT_RESET)
782 tmpbuf[0] |= USB_PORT_STAT_RESET;
783 if (reg & PORT_POWER)
784 /*
785 * XXX: This Port power bit (for USB 3.0 hub)
786 * we are faking in USB 2.0 hub port status;
787 * since there's a change in bit positions in
788 * two:
789 * USB 2.0 port status PP is at position[8]
790 * USB 3.0 port status PP is at position[9]
791 * So, we are still keeping it at position [8]
792 */
793 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
794 if (reg & PORT_CSC)
795 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
796 if (reg & PORT_PEC)
797 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
798 if (reg & PORT_OCC)
799 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
800 if (reg & PORT_RC)
801 tmpbuf[2] |= USB_PORT_STAT_C_RESET;
802
803 srcptr = tmpbuf;
804 srclen = 4;
805 break;
806 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
807 reg = xhci_readl(status_reg);
808 reg = xhci_port_state_to_neutral(reg);
809 switch (le16_to_cpu(req->value)) {
810 case USB_PORT_FEAT_ENABLE:
811 reg |= PORT_PE;
812 xhci_writel(status_reg, reg);
813 break;
814 case USB_PORT_FEAT_POWER:
815 reg |= PORT_POWER;
816 xhci_writel(status_reg, reg);
817 break;
818 case USB_PORT_FEAT_RESET:
819 reg |= PORT_RESET;
820 xhci_writel(status_reg, reg);
821 break;
822 default:
823 printf("unknown feature %x\n", le16_to_cpu(req->value));
824 goto unknown;
825 }
826 break;
827 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
828 reg = xhci_readl(status_reg);
829 reg = xhci_port_state_to_neutral(reg);
830 switch (le16_to_cpu(req->value)) {
831 case USB_PORT_FEAT_ENABLE:
832 reg &= ~PORT_PE;
833 break;
834 case USB_PORT_FEAT_POWER:
835 reg &= ~PORT_POWER;
836 break;
837 case USB_PORT_FEAT_C_RESET:
838 case USB_PORT_FEAT_C_CONNECTION:
839 case USB_PORT_FEAT_C_OVER_CURRENT:
840 case USB_PORT_FEAT_C_ENABLE:
841 xhci_clear_port_change_bit((le16_to_cpu(req->value)),
842 le16_to_cpu(req->index),
843 status_reg, reg);
844 break;
845 default:
846 printf("unknown feature %x\n", le16_to_cpu(req->value));
847 goto unknown;
848 }
849 xhci_writel(status_reg, reg);
850 break;
851 default:
852 puts("Unknown request\n");
853 goto unknown;
854 }
855
856 debug("scrlen = %d\n req->length = %d\n",
857 srclen, le16_to_cpu(req->length));
858
Masahiro Yamadab4141192014-11-07 03:03:31 +0900859 len = min(srclen, (int)le16_to_cpu(req->length));
Vivek Gautam5853e132013-09-14 14:02:45 +0530860
861 if (srcptr != NULL && len > 0)
862 memcpy(buffer, srcptr, len);
863 else
864 debug("Len is 0\n");
865
866 udev->act_len = len;
867 udev->status = 0;
868
869 return 0;
870
871unknown:
872 udev->act_len = 0;
873 udev->status = USB_ST_STALLED;
874
875 return -ENODEV;
876}
877
878/**
879 * Submits the INT request to XHCI Host cotroller
880 *
881 * @param udev pointer to the USB device
882 * @param pipe contains the DIR_IN or OUT , devnum
883 * @param buffer buffer to be read/written based on the request
884 * @param length length of the buffer
885 * @param interval interval of the interrupt
886 * @return 0
887 */
Simon Glassa5762fe2015-03-25 12:22:53 -0600888static int _xhci_submit_int_msg(struct usb_device *udev, unsigned long pipe,
889 void *buffer, int length, int interval)
Vivek Gautam5853e132013-09-14 14:02:45 +0530890{
Bin Meng1897d602017-09-18 06:40:41 -0700891 if (usb_pipetype(pipe) != PIPE_INTERRUPT) {
892 printf("non-interrupt pipe (type=%lu)", usb_pipetype(pipe));
893 return -EINVAL;
894 }
895
Vivek Gautam5853e132013-09-14 14:02:45 +0530896 /*
Bin Meng1897d602017-09-18 06:40:41 -0700897 * xHCI uses normal TRBs for both bulk and interrupt. When the
898 * interrupt endpoint is to be serviced, the xHC will consume
899 * (at most) one TD. A TD (comprised of sg list entries) can
900 * take several service intervals to transmit.
Vivek Gautam5853e132013-09-14 14:02:45 +0530901 */
Bin Meng1897d602017-09-18 06:40:41 -0700902 return xhci_bulk_tx(udev, pipe, length, buffer);
Vivek Gautam5853e132013-09-14 14:02:45 +0530903}
904
905/**
906 * submit the BULK type of request to the USB Device
907 *
908 * @param udev pointer to the USB device
909 * @param pipe contains the DIR_IN or OUT , devnum
910 * @param buffer buffer to be read/written based on the request
911 * @param length length of the buffer
912 * @return returns 0 if successful else -1 on failure
913 */
Simon Glassa5762fe2015-03-25 12:22:53 -0600914static int _xhci_submit_bulk_msg(struct usb_device *udev, unsigned long pipe,
915 void *buffer, int length)
Vivek Gautam5853e132013-09-14 14:02:45 +0530916{
917 if (usb_pipetype(pipe) != PIPE_BULK) {
918 printf("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
919 return -EINVAL;
920 }
921
922 return xhci_bulk_tx(udev, pipe, length, buffer);
923}
924
925/**
926 * submit the control type of request to the Root hub/Device based on the devnum
927 *
928 * @param udev pointer to the USB device
929 * @param pipe contains the DIR_IN or OUT , devnum
930 * @param buffer buffer to be read/written based on the request
931 * @param length length of the buffer
932 * @param setup Request type
Simon Glass5dd75e32015-03-25 12:22:51 -0600933 * @param root_portnr Root port number that this device is on
Vivek Gautam5853e132013-09-14 14:02:45 +0530934 * @return returns 0 if successful else -1 on failure
935 */
Simon Glass5dd75e32015-03-25 12:22:51 -0600936static int _xhci_submit_control_msg(struct usb_device *udev, unsigned long pipe,
937 void *buffer, int length,
938 struct devrequest *setup, int root_portnr)
Vivek Gautam5853e132013-09-14 14:02:45 +0530939{
Simon Glass7c1deec2015-03-25 12:22:49 -0600940 struct xhci_ctrl *ctrl = xhci_get_ctrl(udev);
Vivek Gautam5853e132013-09-14 14:02:45 +0530941 int ret = 0;
942
943 if (usb_pipetype(pipe) != PIPE_CONTROL) {
944 printf("non-control pipe (type=%lu)", usb_pipetype(pipe));
945 return -EINVAL;
946 }
947
948 if (usb_pipedevice(pipe) == ctrl->rootdev)
949 return xhci_submit_root(udev, pipe, buffer, setup);
950
Ted Chen1b108882016-03-18 17:56:52 +1030951 if (setup->request == USB_REQ_SET_ADDRESS &&
952 (setup->requesttype & USB_TYPE_MASK) == USB_TYPE_STANDARD)
Simon Glass5dd75e32015-03-25 12:22:51 -0600953 return xhci_address_device(udev, root_portnr);
Vivek Gautam5853e132013-09-14 14:02:45 +0530954
Ted Chen1b108882016-03-18 17:56:52 +1030955 if (setup->request == USB_REQ_SET_CONFIGURATION &&
956 (setup->requesttype & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
Vivek Gautam5853e132013-09-14 14:02:45 +0530957 ret = xhci_set_configuration(udev);
958 if (ret) {
959 puts("Failed to configure xHCI endpoint\n");
960 return ret;
961 }
962 }
963
964 return xhci_ctrl_tx(udev, pipe, setup, length, buffer);
965}
966
Simon Glass779d1262015-03-25 12:22:52 -0600967static int xhci_lowlevel_init(struct xhci_ctrl *ctrl)
Vivek Gautam5853e132013-09-14 14:02:45 +0530968{
Simon Glass779d1262015-03-25 12:22:52 -0600969 struct xhci_hccr *hccr;
970 struct xhci_hcor *hcor;
Vivek Gautam5853e132013-09-14 14:02:45 +0530971 uint32_t val;
972 uint32_t val2;
973 uint32_t reg;
Vivek Gautam5853e132013-09-14 14:02:45 +0530974
Simon Glass779d1262015-03-25 12:22:52 -0600975 hccr = ctrl->hccr;
976 hcor = ctrl->hcor;
Vivek Gautam5853e132013-09-14 14:02:45 +0530977 /*
978 * Program the Number of Device Slots Enabled field in the CONFIG
979 * register with the max value of slots the HC can handle.
980 */
981 val = (xhci_readl(&hccr->cr_hcsparams1) & HCS_SLOTS_MASK);
982 val2 = xhci_readl(&hcor->or_config);
983 val |= (val2 & ~HCS_SLOTS_MASK);
984 xhci_writel(&hcor->or_config, val);
985
986 /* initializing xhci data structures */
987 if (xhci_mem_init(ctrl, hccr, hcor) < 0)
988 return -ENOMEM;
989
990 reg = xhci_readl(&hccr->cr_hcsparams1);
991 descriptor.hub.bNbrPorts = ((reg & HCS_MAX_PORTS_MASK) >>
992 HCS_MAX_PORTS_SHIFT);
993 printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
994
995 /* Port Indicators */
996 reg = xhci_readl(&hccr->cr_hccparams);
997 if (HCS_INDICATOR(reg))
998 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
999 | 0x80, &descriptor.hub.wHubCharacteristics);
1000
1001 /* Port Power Control */
1002 if (HCC_PPC(reg))
1003 put_unaligned(get_unaligned(&descriptor.hub.wHubCharacteristics)
1004 | 0x01, &descriptor.hub.wHubCharacteristics);
1005
1006 if (xhci_start(hcor)) {
1007 xhci_reset(hcor);
1008 return -ENODEV;
1009 }
1010
1011 /* Zero'ing IRQ control register and IRQ pending register */
1012 xhci_writel(&ctrl->ir_set->irq_control, 0x0);
1013 xhci_writel(&ctrl->ir_set->irq_pending, 0x0);
1014
1015 reg = HC_VERSION(xhci_readl(&hccr->cr_capbase));
1016 printf("USB XHCI %x.%02x\n", reg >> 8, reg & 0xff);
1017
Simon Glass779d1262015-03-25 12:22:52 -06001018 return 0;
1019}
1020
1021static int xhci_lowlevel_stop(struct xhci_ctrl *ctrl)
1022{
1023 u32 temp;
1024
1025 xhci_reset(ctrl->hcor);
1026
1027 debug("// Disabling event ring interrupts\n");
1028 temp = xhci_readl(&ctrl->hcor->or_usbsts);
1029 xhci_writel(&ctrl->hcor->or_usbsts, temp & ~STS_EINT);
1030 temp = xhci_readl(&ctrl->ir_set->irq_pending);
1031 xhci_writel(&ctrl->ir_set->irq_pending, ER_IRQ_DISABLE(temp));
Vivek Gautam5853e132013-09-14 14:02:45 +05301032
1033 return 0;
1034}
1035
Simon Glassa5762fe2015-03-25 12:22:53 -06001036#ifndef CONFIG_DM_USB
Simon Glass5dd75e32015-03-25 12:22:51 -06001037int submit_control_msg(struct usb_device *udev, unsigned long pipe,
1038 void *buffer, int length, struct devrequest *setup)
1039{
1040 struct usb_device *hop = udev;
1041
1042 if (hop->parent)
1043 while (hop->parent->parent)
1044 hop = hop->parent;
1045
1046 return _xhci_submit_control_msg(udev, pipe, buffer, length, setup,
1047 hop->portnr);
1048}
1049
Simon Glassa5762fe2015-03-25 12:22:53 -06001050int submit_bulk_msg(struct usb_device *udev, unsigned long pipe, void *buffer,
1051 int length)
1052{
1053 return _xhci_submit_bulk_msg(udev, pipe, buffer, length);
1054}
1055
1056int submit_int_msg(struct usb_device *udev, unsigned long pipe, void *buffer,
1057 int length, int interval)
1058{
1059 return _xhci_submit_int_msg(udev, pipe, buffer, length, interval);
1060}
1061
Vivek Gautam5853e132013-09-14 14:02:45 +05301062/**
Simon Glass779d1262015-03-25 12:22:52 -06001063 * Intialises the XHCI host controller
1064 * and allocates the necessary data structures
1065 *
1066 * @param index index to the host controller data structure
1067 * @return pointer to the intialised controller
1068 */
1069int usb_lowlevel_init(int index, enum usb_init_type init, void **controller)
1070{
1071 struct xhci_hccr *hccr;
1072 struct xhci_hcor *hcor;
1073 struct xhci_ctrl *ctrl;
1074 int ret;
1075
Sergey Temerkhanova5ccda42015-08-17 15:38:07 +03001076 *controller = NULL;
1077
Simon Glass779d1262015-03-25 12:22:52 -06001078 if (xhci_hcd_init(index, &hccr, (struct xhci_hcor **)&hcor) != 0)
1079 return -ENODEV;
1080
1081 if (xhci_reset(hcor) != 0)
1082 return -ENODEV;
1083
1084 ctrl = &xhcic[index];
1085
1086 ctrl->hccr = hccr;
1087 ctrl->hcor = hcor;
1088
1089 ret = xhci_lowlevel_init(ctrl);
1090
Sergey Temerkhanova5ccda42015-08-17 15:38:07 +03001091 if (ret) {
1092 ctrl->hccr = NULL;
1093 ctrl->hcor = NULL;
1094 } else {
1095 *controller = &xhcic[index];
1096 }
Simon Glass779d1262015-03-25 12:22:52 -06001097
1098 return ret;
1099}
1100
1101/**
Vivek Gautam5853e132013-09-14 14:02:45 +05301102 * Stops the XHCI host controller
1103 * and cleans up all the related data structures
1104 *
1105 * @param index index to the host controller data structure
1106 * @return none
1107 */
1108int usb_lowlevel_stop(int index)
1109{
1110 struct xhci_ctrl *ctrl = (xhcic + index);
Vivek Gautam5853e132013-09-14 14:02:45 +05301111
Sergey Temerkhanova5ccda42015-08-17 15:38:07 +03001112 if (ctrl->hcor) {
1113 xhci_lowlevel_stop(ctrl);
1114 xhci_hcd_stop(index);
1115 xhci_cleanup(ctrl);
1116 }
Vivek Gautam5853e132013-09-14 14:02:45 +05301117
1118 return 0;
1119}
Simon Glassa5762fe2015-03-25 12:22:53 -06001120#endif /* CONFIG_DM_USB */
1121
1122#ifdef CONFIG_DM_USB
Simon Glassa5762fe2015-03-25 12:22:53 -06001123
1124static int xhci_submit_control_msg(struct udevice *dev, struct usb_device *udev,
1125 unsigned long pipe, void *buffer, int length,
1126 struct devrequest *setup)
1127{
1128 struct usb_device *uhop;
1129 struct udevice *hub;
1130 int root_portnr = 0;
1131
1132 debug("%s: dev='%s', udev=%p, udev->dev='%s', portnr=%d\n", __func__,
1133 dev->name, udev, udev->dev->name, udev->portnr);
1134 hub = udev->dev;
1135 if (device_get_uclass_id(hub) == UCLASS_USB_HUB) {
1136 /* Figure out our port number on the root hub */
Bin Meng46c1d492017-07-19 21:51:11 +08001137 if (usb_hub_is_root_hub(hub)) {
Simon Glassa5762fe2015-03-25 12:22:53 -06001138 root_portnr = udev->portnr;
1139 } else {
Bin Meng46c1d492017-07-19 21:51:11 +08001140 while (!usb_hub_is_root_hub(hub->parent))
Simon Glassa5762fe2015-03-25 12:22:53 -06001141 hub = hub->parent;
Simon Glassbcbe3d12015-09-28 23:32:01 -06001142 uhop = dev_get_parent_priv(hub);
Simon Glassa5762fe2015-03-25 12:22:53 -06001143 root_portnr = uhop->portnr;
1144 }
1145 }
1146/*
1147 struct usb_device *hop = udev;
1148
1149 if (hop->parent)
1150 while (hop->parent->parent)
1151 hop = hop->parent;
1152*/
1153 return _xhci_submit_control_msg(udev, pipe, buffer, length, setup,
1154 root_portnr);
1155}
1156
1157static int xhci_submit_bulk_msg(struct udevice *dev, struct usb_device *udev,
1158 unsigned long pipe, void *buffer, int length)
1159{
1160 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1161 return _xhci_submit_bulk_msg(udev, pipe, buffer, length);
1162}
1163
1164static int xhci_submit_int_msg(struct udevice *dev, struct usb_device *udev,
1165 unsigned long pipe, void *buffer, int length,
1166 int interval)
1167{
1168 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1169 return _xhci_submit_int_msg(udev, pipe, buffer, length, interval);
1170}
1171
1172static int xhci_alloc_device(struct udevice *dev, struct usb_device *udev)
1173{
1174 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1175 return _xhci_alloc_device(udev);
1176}
1177
Bin Mengd228ca32017-07-19 21:51:19 +08001178static int xhci_update_hub_device(struct udevice *dev, struct usb_device *udev)
1179{
1180 struct xhci_ctrl *ctrl = dev_get_priv(dev);
1181 struct usb_hub_device *hub = dev_get_uclass_priv(udev->dev);
1182 struct xhci_virt_device *virt_dev;
1183 struct xhci_input_control_ctx *ctrl_ctx;
1184 struct xhci_container_ctx *out_ctx;
1185 struct xhci_container_ctx *in_ctx;
1186 struct xhci_slot_ctx *slot_ctx;
1187 int slot_id = udev->slot_id;
1188 unsigned think_time;
1189
1190 debug("%s: dev='%s', udev=%p\n", __func__, dev->name, udev);
1191
1192 /* Ignore root hubs */
1193 if (usb_hub_is_root_hub(udev->dev))
1194 return 0;
1195
1196 virt_dev = ctrl->devs[slot_id];
1197 BUG_ON(!virt_dev);
1198
1199 out_ctx = virt_dev->out_ctx;
1200 in_ctx = virt_dev->in_ctx;
1201
1202 ctrl_ctx = xhci_get_input_control_ctx(in_ctx);
1203 /* Initialize the input context control */
1204 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
1205 ctrl_ctx->drop_flags = 0;
1206
1207 xhci_inval_cache((uintptr_t)out_ctx->bytes, out_ctx->size);
1208
1209 /* slot context */
1210 xhci_slot_copy(ctrl, in_ctx, out_ctx);
1211 slot_ctx = xhci_get_slot_ctx(ctrl, in_ctx);
1212
1213 /* Update hub related fields */
1214 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
1215 if (hub->tt.multi && udev->speed == USB_SPEED_HIGH)
1216 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
1217 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(udev->maxchild));
1218 /*
1219 * Set TT think time - convert from ns to FS bit times.
1220 * Note 8 FS bit times == (8 bits / 12000000 bps) ~= 666ns
1221 *
1222 * 0 = 8 FS bit times, 1 = 16 FS bit times,
1223 * 2 = 24 FS bit times, 3 = 32 FS bit times.
1224 *
1225 * This field shall be 0 if the device is not a high-spped hub.
1226 */
1227 think_time = hub->tt.think_time;
1228 if (think_time != 0)
1229 think_time = (think_time / 666) - 1;
1230 if (udev->speed == USB_SPEED_HIGH)
1231 slot_ctx->tt_info |= cpu_to_le32(TT_THINK_TIME(think_time));
1232
1233 return xhci_configure_endpoints(udev, false);
1234}
1235
Bin Meng022ceac2017-09-07 06:13:18 -07001236static int xhci_get_max_xfer_size(struct udevice *dev, size_t *size)
1237{
1238 /*
1239 * xHCD allocates one segment which includes 64 TRBs for each endpoint
1240 * and the last TRB in this segment is configured as a link TRB to form
1241 * a TRB ring. Each TRB can transfer up to 64K bytes, however data
1242 * buffers referenced by transfer TRBs shall not span 64KB boundaries.
1243 * Hence the maximum number of TRBs we can use in one transfer is 62.
1244 */
1245 *size = (TRBS_PER_SEGMENT - 2) * TRB_MAX_BUFF_SIZE;
1246
1247 return 0;
1248}
1249
Simon Glassa5762fe2015-03-25 12:22:53 -06001250int xhci_register(struct udevice *dev, struct xhci_hccr *hccr,
1251 struct xhci_hcor *hcor)
1252{
1253 struct xhci_ctrl *ctrl = dev_get_priv(dev);
1254 struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
1255 int ret;
1256
1257 debug("%s: dev='%s', ctrl=%p, hccr=%p, hcor=%p\n", __func__, dev->name,
1258 ctrl, hccr, hcor);
1259
1260 ctrl->dev = dev;
1261
1262 /*
1263 * XHCI needs to issue a Address device command to setup
1264 * proper device context structures, before it can interact
1265 * with the device. So a get_descriptor will fail before any
1266 * of that is done for XHCI unlike EHCI.
1267 */
1268 priv->desc_before_addr = false;
1269
1270 ret = xhci_reset(hcor);
1271 if (ret)
1272 goto err;
1273
1274 ctrl->hccr = hccr;
1275 ctrl->hcor = hcor;
1276 ret = xhci_lowlevel_init(ctrl);
1277 if (ret)
1278 goto err;
1279
1280 return 0;
1281err:
1282 free(ctrl);
1283 debug("%s: failed, ret=%d\n", __func__, ret);
1284 return ret;
1285}
1286
1287int xhci_deregister(struct udevice *dev)
1288{
1289 struct xhci_ctrl *ctrl = dev_get_priv(dev);
1290
1291 xhci_lowlevel_stop(ctrl);
1292 xhci_cleanup(ctrl);
1293
1294 return 0;
1295}
1296
1297struct dm_usb_ops xhci_usb_ops = {
1298 .control = xhci_submit_control_msg,
1299 .bulk = xhci_submit_bulk_msg,
1300 .interrupt = xhci_submit_int_msg,
1301 .alloc_device = xhci_alloc_device,
Bin Mengd228ca32017-07-19 21:51:19 +08001302 .update_hub_device = xhci_update_hub_device,
Bin Meng022ceac2017-09-07 06:13:18 -07001303 .get_max_xfer_size = xhci_get_max_xfer_size,
Simon Glassa5762fe2015-03-25 12:22:53 -06001304};
1305
1306#endif