Tom Rini | ba1ed5b | 2021-12-14 13:36:35 -0500 | [diff] [blame] | 1 | config ARCH_MAP_SYSMEM |
Tom Rini | 1123213 | 2022-04-06 09:21:25 -0400 | [diff] [blame] | 2 | depends on SANDBOX |
Tom Rini | ba1ed5b | 2021-12-14 13:36:35 -0500 | [diff] [blame] | 3 | def_bool y |
| 4 | |
Masahiro Yamada | a350c6a | 2015-07-15 20:59:29 +0900 | [diff] [blame] | 5 | config CREATE_ARCH_SYMLINK |
| 6 | bool |
| 7 | |
Masahiro Yamada | 9a38712 | 2016-06-28 10:48:42 +0900 | [diff] [blame] | 8 | config HAVE_ARCH_IOREMAP |
| 9 | bool |
| 10 | |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 11 | config SYS_CACHE_SHIFT_4 |
| 12 | bool |
| 13 | |
| 14 | config SYS_CACHE_SHIFT_5 |
| 15 | bool |
| 16 | |
| 17 | config SYS_CACHE_SHIFT_6 |
| 18 | bool |
| 19 | |
| 20 | config SYS_CACHE_SHIFT_7 |
| 21 | bool |
| 22 | |
| 23 | config SYS_CACHELINE_SIZE |
| 24 | int |
| 25 | default 128 if SYS_CACHE_SHIFT_7 |
| 26 | default 64 if SYS_CACHE_SHIFT_6 |
| 27 | default 32 if SYS_CACHE_SHIFT_5 |
| 28 | default 16 if SYS_CACHE_SHIFT_4 |
| 29 | # Fall-back for MIPS |
| 30 | default 32 if MIPS |
| 31 | |
Simon Glass | 0b2fa98 | 2020-12-16 21:20:06 -0700 | [diff] [blame] | 32 | config LINKER_LIST_ALIGN |
| 33 | int |
| 34 | default 32 if SANDBOX |
| 35 | default 8 if ARM64 || X86 |
| 36 | default 4 |
| 37 | help |
| 38 | Force the each linker list to be aligned to this boundary. This |
| 39 | is required if ll_entry_get() is used, since otherwise the linker |
| 40 | may add padding into the table, thus breaking it. |
| 41 | See linker_lists.rst for full details. |
| 42 | |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 43 | choice |
| 44 | prompt "Architecture select" |
| 45 | default SANDBOX |
| 46 | |
| 47 | config ARC |
| 48 | bool "ARC architecture" |
Michal Simek | 5ed063d | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 49 | select ARC_TIMER |
| 50 | select CLK |
Michal Simek | 7b56432 | 2020-08-19 10:44:20 +0200 | [diff] [blame] | 51 | select DM |
Alexey Brodkin | a67ef28 | 2015-02-03 13:58:20 +0300 | [diff] [blame] | 52 | select HAVE_PRIVATE_LIBGCC |
Alexey Brodkin | 01496c4 | 2015-03-17 14:55:14 +0300 | [diff] [blame] | 53 | select SUPPORT_OF_CONTROL |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 54 | select SYS_CACHE_SHIFT_7 |
Vlad Zakharov | 3daa7c7 | 2017-03-21 14:49:49 +0300 | [diff] [blame] | 55 | select TIMER |
Tom Rini | 83505a7 | 2022-07-31 21:08:23 -0400 | [diff] [blame] | 56 | select SYS_BIG_ENDIAN if CPU_BIG_ENDIAN |
| 57 | select SYS_LITTLE_ENDIAN if !CPU_BIG_ENDIAN |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 58 | |
| 59 | config ARM |
| 60 | bool "ARM architecture" |
Marek Behún | 8f96965 | 2021-05-20 13:24:22 +0200 | [diff] [blame] | 61 | select ARCH_SUPPORTS_LTO |
Masahiro Yamada | a350c6a | 2015-07-15 20:59:29 +0900 | [diff] [blame] | 62 | select CREATE_ARCH_SYMLINK |
Masahiro Yamada | 64b77ed | 2015-07-03 16:13:09 +0900 | [diff] [blame] | 63 | select HAVE_PRIVATE_LIBGCC if !ARM64 |
Simon Glass | 0153723 | 2021-12-01 09:02:38 -0700 | [diff] [blame] | 64 | select SUPPORT_ACPI |
Masahiro Yamada | 783e6a7 | 2014-09-22 19:59:05 +0900 | [diff] [blame] | 65 | select SUPPORT_OF_CONTROL |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 66 | |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 67 | config M68K |
| 68 | bool "M68000 architecture" |
angelo@sysam.it | 6463fd8 | 2015-12-06 17:47:59 +0100 | [diff] [blame] | 69 | select HAVE_PRIVATE_LIBGCC |
Angelo Dureghello | 1e48392 | 2023-02-07 23:45:03 +0100 | [diff] [blame] | 70 | select USE_PRIVATE_LIBGCC |
Michal Simek | 35b7ca7 | 2020-11-04 15:33:20 +0100 | [diff] [blame] | 71 | select NEEDS_MANUAL_RELOC |
Derald D. Woods | 405fc83 | 2018-01-22 17:17:10 -0600 | [diff] [blame] | 72 | select SYS_BOOT_GET_CMDLINE |
| 73 | select SYS_BOOT_GET_KBD |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 74 | select SYS_CACHE_SHIFT_4 |
Angelo Dureghello | abe0f87 | 2019-03-13 21:46:51 +0100 | [diff] [blame] | 75 | select SUPPORT_OF_CONTROL |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 76 | |
| 77 | config MICROBLAZE |
| 78 | bool "MicroBlaze architecture" |
Masahiro Yamada | 783e6a7 | 2014-09-22 19:59:05 +0900 | [diff] [blame] | 79 | select SUPPORT_OF_CONTROL |
Michal Simek | a36d867 | 2022-06-24 14:16:32 +0200 | [diff] [blame] | 80 | imply CMD_TIMER |
| 81 | imply SPL_REGMAP if SPL |
| 82 | imply SPL_TIMER if SPL |
| 83 | imply TIMER |
| 84 | imply XILINX_TIMER |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 85 | |
| 86 | config MIPS |
| 87 | bool "MIPS architecture" |
Masahiro Yamada | 9a38712 | 2016-06-28 10:48:42 +0900 | [diff] [blame] | 88 | select HAVE_ARCH_IOREMAP |
Masahiro Yamada | 45ccec8 | 2014-10-24 01:30:43 +0900 | [diff] [blame] | 89 | select HAVE_PRIVATE_LIBGCC |
Daniel Schwierzeck | 0fc13a9 | 2015-12-19 20:20:48 +0100 | [diff] [blame] | 90 | select SUPPORT_OF_CONTROL |
Sean Anderson | 1dd56db | 2022-04-12 10:59:04 -0400 | [diff] [blame] | 91 | select SPL_SEPARATE_BSS if SPL |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 92 | |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 93 | config NIOS2 |
| 94 | bool "Nios II architecture" |
Thomas Chou | bcae80e | 2015-10-21 21:34:57 +0800 | [diff] [blame] | 95 | select CPU |
Michal Simek | 5ed063d | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 96 | select DM |
Tom Rini | 448e2b6 | 2023-01-16 15:46:49 -0500 | [diff] [blame] | 97 | select DM_EVENT |
Michal Simek | 5ed063d | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 98 | select OF_CONTROL |
| 99 | select SUPPORT_OF_CONTROL |
Michal Simek | 08a00cb | 2018-07-23 15:55:14 +0200 | [diff] [blame] | 100 | imply CMD_DM |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 101 | |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 102 | config PPC |
| 103 | bool "PowerPC architecture" |
Masahiro Yamada | 45ccec8 | 2014-10-24 01:30:43 +0900 | [diff] [blame] | 104 | select HAVE_PRIVATE_LIBGCC |
Simon Glass | c1c6157 | 2015-02-07 11:51:35 -0700 | [diff] [blame] | 105 | select SUPPORT_OF_CONTROL |
Derald D. Woods | 405fc83 | 2018-01-22 17:17:10 -0600 | [diff] [blame] | 106 | select SYS_BOOT_GET_CMDLINE |
| 107 | select SYS_BOOT_GET_KBD |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 108 | |
Rick Chen | 068feb9 | 2017-12-26 13:55:58 +0800 | [diff] [blame] | 109 | config RISCV |
Bin Meng | 117a433 | 2018-09-26 06:55:06 -0700 | [diff] [blame] | 110 | bool "RISC-V architecture" |
Anup Patel | 7c8d210 | 2019-02-25 08:14:04 +0000 | [diff] [blame] | 111 | select CREATE_ARCH_SYMLINK |
Rick Chen | 068feb9 | 2017-12-26 13:55:58 +0800 | [diff] [blame] | 112 | select SUPPORT_OF_CONTROL |
Bin Meng | bf6cc82 | 2018-09-26 06:55:19 -0700 | [diff] [blame] | 113 | select OF_CONTROL |
| 114 | select DM |
Tom Rini | 448e2b6 | 2023-01-16 15:46:49 -0500 | [diff] [blame] | 115 | select DM_EVENT |
Zong Li | 57b9900 | 2022-11-16 07:08:39 +0000 | [diff] [blame] | 116 | imply SPL_SEPARATE_BSS if SPL |
Bin Meng | cd1f45c | 2018-09-26 06:55:20 -0700 | [diff] [blame] | 117 | imply DM_SERIAL |
Bin Meng | cd1f45c | 2018-09-26 06:55:20 -0700 | [diff] [blame] | 118 | imply DM_MMC |
| 119 | imply DM_SPI |
| 120 | imply DM_SPI_FLASH |
| 121 | imply BLK |
| 122 | imply CLK |
| 123 | imply MTD |
| 124 | imply TIMER |
Bin Meng | bf6cc82 | 2018-09-26 06:55:19 -0700 | [diff] [blame] | 125 | imply CMD_DM |
Lukas Auer | 8c59f20 | 2019-08-21 21:14:45 +0200 | [diff] [blame] | 126 | imply SPL_DM |
| 127 | imply SPL_OF_CONTROL |
| 128 | imply SPL_LIBCOMMON_SUPPORT |
| 129 | imply SPL_LIBGENERIC_SUPPORT |
Simon Glass | 2a73606 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 130 | imply SPL_SERIAL |
Lukas Auer | 8c59f20 | 2019-08-21 21:14:45 +0200 | [diff] [blame] | 131 | imply SPL_TIMER |
Rick Chen | 068feb9 | 2017-12-26 13:55:58 +0800 | [diff] [blame] | 132 | |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 133 | config SANDBOX |
| 134 | bool "Sandbox" |
Marek Behún | 94bb891 | 2021-05-20 13:24:07 +0200 | [diff] [blame] | 135 | select ARCH_SUPPORTS_LTO |
Tom Rini | e5ec481 | 2017-01-22 19:43:11 -0500 | [diff] [blame] | 136 | select BOARD_LATE_INIT |
Michael Walle | efc0644 | 2020-05-22 14:07:38 +0200 | [diff] [blame] | 137 | select BZIP2 |
Heinrich Schuchardt | b1ad415 | 2020-10-27 20:29:22 +0100 | [diff] [blame] | 138 | select CMD_POWEROFF |
Masahiro Yamada | 58d423b | 2015-03-31 12:47:53 +0900 | [diff] [blame] | 139 | select DM |
Tom Rini | 448e2b6 | 2023-01-16 15:46:49 -0500 | [diff] [blame] | 140 | select DM_EVENT |
Andrew Scull | 0518e7a | 2022-05-30 10:00:12 +0000 | [diff] [blame] | 141 | select DM_FUZZING_ENGINE |
Masahiro Yamada | 58d423b | 2015-03-31 12:47:53 +0900 | [diff] [blame] | 142 | select DM_GPIO |
Michal Simek | 5ed063d | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 143 | select DM_I2C |
| 144 | select DM_KEYBOARD |
Simon Glass | 9a46bd3 | 2016-06-12 23:30:26 -0600 | [diff] [blame] | 145 | select DM_MMC |
Michal Simek | 5ed063d | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 146 | select DM_SERIAL |
| 147 | select DM_SPI |
| 148 | select DM_SPI_FLASH |
Michael Walle | efc0644 | 2020-05-22 14:07:38 +0200 | [diff] [blame] | 149 | select GZIP_COMPRESSED |
Tom Rini | 68e5404 | 2022-11-19 18:45:23 -0500 | [diff] [blame] | 150 | select IO_TRACE |
Tom Rini | d56b4b1 | 2017-07-22 18:36:16 -0400 | [diff] [blame] | 151 | select LZO |
Heinrich Schuchardt | 1c0bc80 | 2020-03-14 12:13:40 +0100 | [diff] [blame] | 152 | select OF_BOARD_SETUP |
Ramon Fried | bb41333 | 2019-04-27 11:15:23 +0300 | [diff] [blame] | 153 | select PCI_ENDPOINT |
Michal Simek | 5ed063d | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 154 | select SPI |
| 155 | select SUPPORT_OF_CONTROL |
Heinrich Schuchardt | b1ad415 | 2020-10-27 20:29:22 +0100 | [diff] [blame] | 156 | select SYSRESET_CMD_POWEROFF |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 157 | select SYS_CACHE_SHIFT_4 |
Wasim Khan | 57c675d | 2021-03-08 16:48:16 +0100 | [diff] [blame] | 158 | select IRQ |
Kory Maincent | 95300f2 | 2021-05-04 19:31:23 +0200 | [diff] [blame] | 159 | select SUPPORT_EXTENSION_SCAN |
Simon Glass | e1722fc | 2021-12-01 09:02:36 -0700 | [diff] [blame] | 160 | select SUPPORT_ACPI |
Bin Meng | 0f1caa9 | 2018-08-02 23:58:03 -0700 | [diff] [blame] | 161 | imply BITREVERSE |
Simon Glass | 919e7a8 | 2018-11-15 18:43:53 -0700 | [diff] [blame] | 162 | select BLOBLIST |
Marek Behún | 1b457e7 | 2021-05-20 13:24:08 +0200 | [diff] [blame] | 163 | imply LTO |
Michal Simek | 08a00cb | 2018-07-23 15:55:14 +0200 | [diff] [blame] | 164 | imply CMD_DM |
Heinrich Schuchardt | 6ca5ff3 | 2020-11-12 00:29:59 +0100 | [diff] [blame] | 165 | imply CMD_EXCEPTION |
Simon Glass | ded48cd | 2017-05-17 03:25:44 -0600 | [diff] [blame] | 166 | imply CMD_GETTIME |
Simon Glass | 551c393 | 2017-05-17 03:25:25 -0600 | [diff] [blame] | 167 | imply CMD_HASH |
Simon Glass | 594e8d1 | 2017-05-17 03:25:34 -0600 | [diff] [blame] | 168 | imply CMD_IO |
Simon Glass | 7d0f5c1 | 2017-05-17 03:25:36 -0600 | [diff] [blame] | 169 | imply CMD_IOTRACE |
Simon Glass | ee7c0e7 | 2017-05-17 03:25:43 -0600 | [diff] [blame] | 170 | imply CMD_LZMADEC |
Tom Rini | a4298dd | 2019-05-29 17:01:28 -0400 | [diff] [blame] | 171 | imply CMD_SF |
Michal Simek | 5ed063d | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 172 | imply CMD_SF_TEST |
Tom Rini | 91d27a1 | 2017-06-02 11:03:50 -0400 | [diff] [blame] | 173 | imply CRC32_VERIFY |
| 174 | imply FAT_WRITE |
Rajan Vaja | 31b8217 | 2018-09-19 03:43:46 -0700 | [diff] [blame] | 175 | imply FIRMWARE |
Andrew Scull | 0518e7a | 2022-05-30 10:00:12 +0000 | [diff] [blame] | 176 | imply FUZZING_ENGINE_SANDBOX |
Daniel Thompson | 221a949 | 2017-05-19 17:26:58 +0100 | [diff] [blame] | 177 | imply HASH_VERIFY |
Tom Rini | 91d27a1 | 2017-06-02 11:03:50 -0400 | [diff] [blame] | 178 | imply LZMA |
Jens Wiklander | fe39e8e | 2018-09-25 16:40:17 +0200 | [diff] [blame] | 179 | imply TEE |
Jens Wiklander | 0a60a81 | 2018-09-25 16:40:23 +0200 | [diff] [blame] | 180 | imply AVB_VERIFY |
| 181 | imply LIBAVB |
| 182 | imply CMD_AVB |
Heinrich Schuchardt | d3adee1 | 2022-01-16 13:04:06 +0100 | [diff] [blame] | 183 | imply PARTITION_TYPE_GUID |
Igor Opaniuk | 7c591a8 | 2021-02-14 16:27:27 +0100 | [diff] [blame] | 184 | imply SCP03 |
| 185 | imply CMD_SCP03 |
Jens Wiklander | 0a60a81 | 2018-09-25 16:40:23 +0200 | [diff] [blame] | 186 | imply UDP_FUNCTION_FASTBOOT |
Bin Meng | 4f89d49 | 2018-10-15 02:21:26 -0700 | [diff] [blame] | 187 | imply VIRTIO_MMIO |
| 188 | imply VIRTIO_PCI |
| 189 | imply VIRTIO_SANDBOX |
| 190 | imply VIRTIO_BLK |
| 191 | imply VIRTIO_NET |
Simon Glass | 2a04957 | 2018-12-10 10:37:31 -0700 | [diff] [blame] | 192 | imply DM_SOUND |
Ramon Fried | bb41333 | 2019-04-27 11:15:23 +0300 | [diff] [blame] | 193 | imply PCI_SANDBOX_EP |
Simon Glass | c882163 | 2019-02-16 20:24:49 -0700 | [diff] [blame] | 194 | imply PCH |
Alex Marginean | ec9594a | 2019-06-03 19:12:28 +0300 | [diff] [blame] | 195 | imply PHYLIB |
| 196 | imply DM_MDIO |
Alex Marginean | c3d9f3f | 2019-07-12 10:13:53 +0300 | [diff] [blame] | 197 | imply DM_MDIO_MUX |
Simon Glass | 3b65ee3 | 2019-12-06 21:41:54 -0700 | [diff] [blame] | 198 | imply ACPI_PMC |
| 199 | imply ACPI_PMC_SANDBOX |
| 200 | imply CMD_PMC |
John Chau | 4a4830c | 2020-07-02 12:01:21 +0800 | [diff] [blame] | 201 | imply CMD_CLONE |
Simon Glass | f158ba1 | 2020-11-05 10:33:38 -0700 | [diff] [blame] | 202 | imply SILENT_CONSOLE |
Simon Glass | 51bb338 | 2020-11-05 10:33:48 -0700 | [diff] [blame] | 203 | imply BOOTARGS_SUBST |
Claudiu Manoil | ff98da0 | 2021-03-14 20:14:57 +0800 | [diff] [blame] | 204 | imply PHY_FIXED |
| 205 | imply DM_DSA |
Kory Maincent | 95300f2 | 2021-05-04 19:31:23 +0200 | [diff] [blame] | 206 | imply CMD_EXTENSION |
Simon Glass | 93e1edf | 2021-11-24 09:26:44 -0700 | [diff] [blame] | 207 | imply KEYBOARD |
Simon Glass | 6405ab7 | 2021-11-24 09:26:42 -0700 | [diff] [blame] | 208 | imply PHYSMEM |
Simon Glass | 437992d | 2021-12-01 09:02:43 -0700 | [diff] [blame] | 209 | imply GENERATE_ACPI_TABLE |
Philippe Reynes | 059df56 | 2022-03-28 22:56:53 +0200 | [diff] [blame] | 210 | imply BINMAN |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 211 | |
| 212 | config SH |
| 213 | bool "SuperH architecture" |
Masahiro Yamada | 45ccec8 | 2014-10-24 01:30:43 +0900 | [diff] [blame] | 214 | select HAVE_PRIVATE_LIBGCC |
Marek Vasut | 8c2c463 | 2019-08-31 18:27:58 +0200 | [diff] [blame] | 215 | select SUPPORT_OF_CONTROL |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 216 | |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 217 | config X86 |
| 218 | bool "x86 architecture" |
Simon Glass | 9898790 | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 219 | select SUPPORT_SPL |
| 220 | select SUPPORT_TPL |
Masahiro Yamada | a350c6a | 2015-07-15 20:59:29 +0900 | [diff] [blame] | 221 | select CREATE_ARCH_SYMLINK |
Masahiro Yamada | 58d423b | 2015-03-31 12:47:53 +0900 | [diff] [blame] | 222 | select DM |
Bin Meng | 3bf9a8e | 2018-10-15 02:21:16 -0700 | [diff] [blame] | 223 | select HAVE_ARCH_IOMAP |
Michal Simek | 5ed063d | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 224 | select HAVE_PRIVATE_LIBGCC |
| 225 | select OF_CONTROL |
Bin Meng | 4f0faac | 2017-07-30 06:23:16 -0700 | [diff] [blame] | 226 | select PCI |
Simon Glass | e1722fc | 2021-12-01 09:02:36 -0700 | [diff] [blame] | 227 | select SUPPORT_ACPI |
Michal Simek | 5ed063d | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 228 | select SUPPORT_OF_CONTROL |
Tom Rini | ab92b38 | 2021-08-26 11:47:59 -0400 | [diff] [blame] | 229 | select SYS_CACHE_SHIFT_6 |
Bin Meng | 0ce9c57 | 2017-07-30 06:23:07 -0700 | [diff] [blame] | 230 | select TIMER |
Michal Simek | 5ed063d | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 231 | select USE_PRIVATE_LIBGCC |
Bin Meng | 0ce9c57 | 2017-07-30 06:23:07 -0700 | [diff] [blame] | 232 | select X86_TSC_TIMER |
Wasim Khan | 543d091 | 2021-03-08 16:48:15 +0100 | [diff] [blame] | 233 | select IRQ |
Simon Glass | bcd4e6f | 2020-07-19 13:55:52 -0600 | [diff] [blame] | 234 | imply HAS_ROM if X86_RESET_VECTOR |
Bin Meng | 24357df | 2017-07-30 19:24:02 -0700 | [diff] [blame] | 235 | imply BLK |
Michal Simek | 08a00cb | 2018-07-23 15:55:14 +0200 | [diff] [blame] | 236 | imply CMD_DM |
Simon Glass | fe7604a | 2017-05-17 03:25:21 -0600 | [diff] [blame] | 237 | imply CMD_FPGA_LOADMK |
Simon Glass | d91a9d7 | 2017-05-17 03:25:23 -0600 | [diff] [blame] | 238 | imply CMD_GETTIME |
Simon Glass | 594e8d1 | 2017-05-17 03:25:34 -0600 | [diff] [blame] | 239 | imply CMD_IO |
Simon Glass | 1b33089 | 2017-05-17 03:25:39 -0600 | [diff] [blame] | 240 | imply CMD_IRQ |
Bin Meng | c11b17c | 2017-08-16 05:46:49 -0700 | [diff] [blame] | 241 | imply CMD_PCI |
Tom Rini | a4298dd | 2019-05-29 17:01:28 -0400 | [diff] [blame] | 242 | imply CMD_SF |
Simon Glass | 719d36e | 2017-08-04 16:34:46 -0600 | [diff] [blame] | 243 | imply CMD_SF_TEST |
Simon Glass | e7a815f | 2017-08-04 16:35:03 -0600 | [diff] [blame] | 244 | imply CMD_ZBOOT |
Michal Simek | 5ed063d | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 245 | imply DM_GPIO |
| 246 | imply DM_KEYBOARD |
| 247 | imply DM_MMC |
| 248 | imply DM_RTC |
| 249 | imply DM_SCSI |
| 250 | imply DM_SERIAL |
| 251 | imply DM_SPI |
| 252 | imply DM_SPI_FLASH |
| 253 | imply DM_USB |
Simon Glass | b86986c | 2022-10-18 07:46:31 -0600 | [diff] [blame] | 254 | imply VIDEO |
Michal Simek | 5ed063d | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 255 | imply SYSRESET |
Kever Yang | 09259fc | 2019-04-02 20:41:25 +0800 | [diff] [blame] | 256 | imply SPL_SYSRESET |
Michal Simek | 5ed063d | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 257 | imply SYSRESET_X86 |
Chris Packham | f58ad98 | 2017-08-28 20:50:46 +1200 | [diff] [blame] | 258 | imply USB_ETHER_ASIX |
| 259 | imply USB_ETHER_SMSC95XX |
Michal Simek | 5ed063d | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 260 | imply USB_HOST_ETHER |
Simon Glass | c882163 | 2019-02-16 20:24:49 -0700 | [diff] [blame] | 261 | imply PCH |
Simon Glass | 6405ab7 | 2021-11-24 09:26:42 -0700 | [diff] [blame] | 262 | imply PHYSMEM |
Simon Glass | 31d5261 | 2019-05-02 10:52:24 -0600 | [diff] [blame] | 263 | imply RTC_MC146818 |
Simon Glass | 27ba628 | 2021-12-01 09:02:39 -0700 | [diff] [blame] | 264 | imply ACPIGEN if !QEMU && !EFI_APP |
Simon Glass | 839d66c | 2020-11-05 06:32:17 -0700 | [diff] [blame] | 265 | imply SYSINFO if GENERATE_SMBIOS_TABLE |
| 266 | imply SYSINFO_SMBIOS if GENERATE_SMBIOS_TABLE |
Simon Glass | d6b318d | 2021-12-18 11:27:50 -0700 | [diff] [blame] | 267 | imply TIMESTAMP |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 268 | |
Simon Glass | 9898790 | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 269 | # Thing to enable for when SPL/TPL are enabled: SPL |
| 270 | imply SPL_DM |
| 271 | imply SPL_OF_LIBFDT |
Simon Glass | 9ca0068 | 2021-07-10 21:14:31 -0600 | [diff] [blame] | 272 | imply SPL_DRIVERS_MISC |
Simon Glass | 83061db | 2021-07-10 21:14:30 -0600 | [diff] [blame] | 273 | imply SPL_GPIO |
Simon Glass | e556d3d | 2019-12-06 21:42:51 -0700 | [diff] [blame] | 274 | imply SPL_PINCTRL |
Simon Glass | 9898790 | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 275 | imply SPL_LIBCOMMON_SUPPORT |
| 276 | imply SPL_LIBGENERIC_SUPPORT |
Simon Glass | 2a73606 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 277 | imply SPL_SERIAL |
Simon Glass | 9898790 | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 278 | imply SPL_SPI_FLASH_SUPPORT |
Simon Glass | ea2ca7e | 2021-08-08 12:20:14 -0600 | [diff] [blame] | 279 | imply SPL_SPI |
Simon Glass | 9898790 | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 280 | imply SPL_OF_CONTROL |
| 281 | imply SPL_TIMER |
| 282 | imply SPL_REGMAP |
| 283 | imply SPL_SYSCON |
| 284 | # TPL |
| 285 | imply TPL_DM |
Simon Glass | 9ca0068 | 2021-07-10 21:14:31 -0600 | [diff] [blame] | 286 | imply TPL_DRIVERS_MISC |
Simon Glass | 83061db | 2021-07-10 21:14:30 -0600 | [diff] [blame] | 287 | imply TPL_GPIO |
Simon Glass | e556d3d | 2019-12-06 21:42:51 -0700 | [diff] [blame] | 288 | imply TPL_PINCTRL |
Simon Glass | 9898790 | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 289 | imply TPL_LIBCOMMON_SUPPORT |
| 290 | imply TPL_LIBGENERIC_SUPPORT |
Simon Glass | 2a73606 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 291 | imply TPL_SERIAL |
Simon Glass | 9898790 | 2019-04-25 21:58:45 -0600 | [diff] [blame] | 292 | imply TPL_OF_CONTROL |
| 293 | imply TPL_TIMER |
| 294 | imply TPL_REGMAP |
| 295 | imply TPL_SYSCON |
| 296 | |
Chris Zankel | c978b52 | 2016-08-10 18:36:44 +0300 | [diff] [blame] | 297 | config XTENSA |
| 298 | bool "Xtensa architecture" |
| 299 | select CREATE_ARCH_SYMLINK |
| 300 | select SUPPORT_OF_CONTROL |
| 301 | |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 302 | endchoice |
| 303 | |
Masahiro Yamada | 3174e4e | 2014-09-14 03:01:48 +0900 | [diff] [blame] | 304 | config SYS_ARCH |
| 305 | string |
| 306 | help |
| 307 | This option should contain the architecture name to build the |
| 308 | appropriate arch/<CONFIG_SYS_ARCH> directory. |
| 309 | All the architectures should specify this option correctly. |
| 310 | |
| 311 | config SYS_CPU |
| 312 | string |
| 313 | help |
| 314 | This option should contain the CPU name to build the correct |
| 315 | arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU> directory. |
| 316 | |
| 317 | This is optional. For those targets without the CPU directory, |
| 318 | leave this option empty. |
| 319 | |
| 320 | config SYS_SOC |
| 321 | string |
| 322 | help |
| 323 | This option should contain the SoC name to build the directory |
| 324 | arch/<CONFIG_SYS_ARCH>/cpu/<CONFIG_SYS_CPU>/<CONFIG_SYS_SOC>. |
| 325 | |
| 326 | This is optional. For those targets without the SoC directory, |
| 327 | leave this option empty. |
| 328 | |
| 329 | config SYS_VENDOR |
| 330 | string |
| 331 | help |
| 332 | This option should contain the vendor name of the target board. |
| 333 | If it is set and |
| 334 | board/<CONFIG_SYS_VENDOR>/common/Makefile exists, the vendor common |
| 335 | directory is compiled. |
| 336 | If CONFIG_SYS_BOARD is also set, the sources under |
| 337 | board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> directory are compiled. |
| 338 | |
| 339 | This is optional. For those targets without the vendor directory, |
| 340 | leave this option empty. |
| 341 | |
| 342 | config SYS_BOARD |
| 343 | string |
| 344 | help |
| 345 | This option should contain the name of the target board. |
| 346 | If it is set, either board/<CONFIG_SYS_VENDOR>/<CONFIG_SYS_BOARD> |
| 347 | or board/<CONFIG_SYS_BOARD> directory is compiled depending on |
| 348 | whether CONFIG_SYS_VENDOR is set or not. |
| 349 | |
| 350 | This is optional. For those targets without the board directory, |
| 351 | leave this option empty. |
| 352 | |
| 353 | config SYS_CONFIG_NAME |
| 354 | string |
| 355 | help |
| 356 | This option should contain the base name of board header file. |
| 357 | The header file include/configs/<CONFIG_SYS_CONFIG_NAME>.h |
| 358 | should be included from include/config.h. |
| 359 | |
Vignesh Raghavendra | add4967 | 2019-04-22 21:43:32 +0530 | [diff] [blame] | 360 | config SYS_DISABLE_DCACHE_OPS |
| 361 | bool |
| 362 | help |
| 363 | This option disables dcache flush and dcache invalidation |
| 364 | operations. For example, on coherent systems where cache |
| 365 | operatios are not required, enable this option to avoid them. |
| 366 | Note that, its up to the individual architectures to implement |
| 367 | this functionality. |
| 368 | |
Tom Rini | be7dbb6 | 2021-12-12 22:12:30 -0500 | [diff] [blame] | 369 | config SYS_IMMR |
Tom Rini | dd2986a | 2022-03-30 09:30:15 -0400 | [diff] [blame] | 370 | hex "Address for the Internal Memory-Mapped Registers (IMMR) window" |
Tom Rini | be7dbb6 | 2021-12-12 22:12:30 -0500 | [diff] [blame] | 371 | depends on PPC || FSL_LSCH2 || FSL_LSCH3 || ARCH_LS1021A |
| 372 | default 0xFF000000 if MPC8xx |
| 373 | default 0xF0000000 if ARCH_MPC8313 |
| 374 | default 0xE0000000 if MPC83xx && !ARCH_MPC8313 |
| 375 | default 0x01000000 if ARCH_LS1021A || FSL_LSCH2 || FSL_LSCH3 |
Pali Rohár | 39f42fe | 2022-05-02 18:29:25 +0200 | [diff] [blame] | 376 | default 0xFFE00000 if ARCH_P1010 || ARCH_P1011 || ARCH_P1020 || \ |
| 377 | ARCH_P1021 || ARCH_P1024 || ARCH_P1025 || \ |
| 378 | ARCH_P2020 |
Tom Rini | be7dbb6 | 2021-12-12 22:12:30 -0500 | [diff] [blame] | 379 | default SYS_CCSRBAR_DEFAULT |
| 380 | help |
| 381 | Address for the Internal Memory-Mapped Registers (IMMR) window used |
| 382 | to configure the features of many Freescale / NXP SoCs. |
| 383 | |
Tom Rini | e52fca2 | 2022-12-02 16:42:36 -0500 | [diff] [blame] | 384 | config MONITOR_IS_IN_RAM |
| 385 | bool "U-Boot is loaded in to RAM by a pre-loader" |
| 386 | depends on M68K || NIOS2 |
| 387 | |
Heinrich Schuchardt | c394e8d | 2022-12-30 19:41:28 +0100 | [diff] [blame] | 388 | menu "Skipping low level initialization functions" |
Tom Rini | 1123213 | 2022-04-06 09:21:25 -0400 | [diff] [blame] | 389 | depends on ARM || MIPS || RISCV |
Heinrich Schuchardt | c394e8d | 2022-12-30 19:41:28 +0100 | [diff] [blame] | 390 | |
| 391 | config SKIP_LOWLEVEL_INIT |
| 392 | bool "Skip calls to certain low level initialization functions" |
Tom Rini | a2ac2b9 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 393 | help |
| 394 | If enabled, then certain low level initializations (like setting up |
| 395 | the memory controller) are omitted and/or U-Boot does not relocate |
| 396 | itself into RAM. |
| 397 | Normally this variable MUST NOT be defined. The only exception is |
| 398 | when U-Boot is loaded (to RAM) by some other boot loader or by a |
| 399 | debugger which performs these initializations itself. |
| 400 | |
| 401 | config SPL_SKIP_LOWLEVEL_INIT |
Heinrich Schuchardt | c394e8d | 2022-12-30 19:41:28 +0100 | [diff] [blame] | 402 | bool "Skip calls to certain low level initialization functions in SPL" |
| 403 | depends on SPL |
Tom Rini | a2ac2b9 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 404 | help |
| 405 | If enabled, then certain low level initializations (like setting up |
| 406 | the memory controller) are omitted and/or U-Boot does not relocate |
| 407 | itself into RAM. |
| 408 | Normally this variable MUST NOT be defined. The only exception is |
| 409 | when U-Boot is loaded (to RAM) by some other boot loader or by a |
| 410 | debugger which performs these initializations itself. |
| 411 | |
| 412 | config TPL_SKIP_LOWLEVEL_INIT |
Heinrich Schuchardt | c394e8d | 2022-12-30 19:41:28 +0100 | [diff] [blame] | 413 | bool "Skip calls to certain low level initialization functions in TPL" |
Tom Rini | a2ac2b9 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 414 | depends on SPL && ARM |
| 415 | help |
| 416 | If enabled, then certain low level initializations (like setting up |
| 417 | the memory controller) are omitted and/or U-Boot does not relocate |
| 418 | itself into RAM. |
| 419 | Normally this variable MUST NOT be defined. The only exception is |
| 420 | when U-Boot is loaded (to RAM) by some other boot loader or by a |
| 421 | debugger which performs these initializations itself. |
| 422 | |
| 423 | config SKIP_LOWLEVEL_INIT_ONLY |
Heinrich Schuchardt | c394e8d | 2022-12-30 19:41:28 +0100 | [diff] [blame] | 424 | bool "Skip call to lowlevel_init during early boot ONLY" |
Tom Rini | a2ac2b9 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 425 | depends on ARM |
| 426 | help |
| 427 | This allows just the call to lowlevel_init() to be skipped. The |
| 428 | normal CP15 init (such as enabling the instruction cache) is still |
| 429 | performed. |
| 430 | |
| 431 | config SPL_SKIP_LOWLEVEL_INIT_ONLY |
Heinrich Schuchardt | c394e8d | 2022-12-30 19:41:28 +0100 | [diff] [blame] | 432 | bool "Skip call to lowlevel_init during early SPL boot ONLY" |
Tom Rini | a2ac2b9 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 433 | depends on SPL && ARM |
| 434 | help |
| 435 | This allows just the call to lowlevel_init() to be skipped. The |
| 436 | normal CP15 init (such as enabling the instruction cache) is still |
| 437 | performed. |
| 438 | |
| 439 | config TPL_SKIP_LOWLEVEL_INIT_ONLY |
Heinrich Schuchardt | c394e8d | 2022-12-30 19:41:28 +0100 | [diff] [blame] | 440 | bool "Skip call to lowlevel_init during early TPL boot ONLY" |
Tom Rini | a2ac2b9 | 2021-08-27 21:18:30 -0400 | [diff] [blame] | 441 | depends on TPL && ARM |
| 442 | help |
| 443 | This allows just the call to lowlevel_init() to be skipped. The |
| 444 | normal CP15 init (such as enabling the instruction cache) is still |
| 445 | performed. |
| 446 | |
Heinrich Schuchardt | c394e8d | 2022-12-30 19:41:28 +0100 | [diff] [blame] | 447 | endmenu |
| 448 | |
Tom Rini | 8c778f7 | 2022-10-28 20:27:10 -0400 | [diff] [blame] | 449 | config SYS_HAS_NONCACHED_MEMORY |
| 450 | bool "Enable reserving a non-cached memory area for drivers" |
| 451 | depends on (ARM || MIPS) && (RTL8169 || MEDIATEK_ETH) |
| 452 | help |
| 453 | This is useful for drivers that would otherwise require a lot of |
| 454 | explicit cache maintenance. For some drivers it's also impossible to |
| 455 | properly maintain the cache. For example if the regions that need to |
| 456 | be flushed are not a multiple of the cache-line size, *and* padding |
| 457 | cannot be allocated between the regions to align them (i.e. if the |
| 458 | HW requires a contiguous array of regions, and the size of each |
| 459 | region is not cache-aligned), then a flush of one region may result |
| 460 | in overwriting data that hardware has written to another region in |
| 461 | the same cache-line. This can happen for example in network drivers |
| 462 | where descriptors for buffers are typically smaller than the CPU |
| 463 | cache-line (e.g. 16 bytes vs. 32 or 64 bytes). |
| 464 | |
| 465 | config SYS_NONCACHED_MEMORY |
| 466 | hex "Size in bytes of the non-cached memory area" |
| 467 | depends on SYS_HAS_NONCACHED_MEMORY |
| 468 | default 0x100000 |
| 469 | help |
| 470 | Size of non-cached memory area. This area of memory will be typically |
| 471 | located right below the malloc() area and mapped uncached in the MMU. |
| 472 | |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 473 | source "arch/arc/Kconfig" |
| 474 | source "arch/arm/Kconfig" |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 475 | source "arch/m68k/Kconfig" |
| 476 | source "arch/microblaze/Kconfig" |
| 477 | source "arch/mips/Kconfig" |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 478 | source "arch/nios2/Kconfig" |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 479 | source "arch/powerpc/Kconfig" |
| 480 | source "arch/sandbox/Kconfig" |
| 481 | source "arch/sh/Kconfig" |
Masahiro Yamada | 5163125 | 2014-07-30 14:08:15 +0900 | [diff] [blame] | 482 | source "arch/x86/Kconfig" |
Chris Zankel | c978b52 | 2016-08-10 18:36:44 +0300 | [diff] [blame] | 483 | source "arch/xtensa/Kconfig" |
Rick Chen | 068feb9 | 2017-12-26 13:55:58 +0800 | [diff] [blame] | 484 | source "arch/riscv/Kconfig" |
Tom Rini | c6c0e56 | 2022-03-23 17:19:55 -0400 | [diff] [blame] | 485 | |
Tom Rini | d622b08 | 2022-06-16 14:04:36 -0400 | [diff] [blame] | 486 | if ARM || M68K || PPC |
| 487 | |
| 488 | source "arch/Kconfig.nxp" |
| 489 | |
| 490 | endif |
| 491 | |
Tom Rini | c6c0e56 | 2022-03-23 17:19:55 -0400 | [diff] [blame] | 492 | source "board/keymile/Kconfig" |
Michal Simek | 89e81e6 | 2022-06-24 14:14:59 +0200 | [diff] [blame] | 493 | |
Michal Simek | 10fd6d6 | 2022-06-24 14:14:59 +0200 | [diff] [blame] | 494 | if MIPS || MICROBLAZE |
Michal Simek | 89e81e6 | 2022-06-24 14:14:59 +0200 | [diff] [blame] | 495 | |
| 496 | choice |
| 497 | prompt "Endianness selection" |
| 498 | help |
| 499 | Some MIPS boards can be configured for either little or big endian |
| 500 | byte order. These modes require different U-Boot images. In general there |
| 501 | is one preferred byteorder for a particular system but some systems are |
| 502 | just as commonly used in the one or the other endianness. |
| 503 | |
| 504 | config SYS_BIG_ENDIAN |
| 505 | bool "Big endian" |
Michal Simek | 10fd6d6 | 2022-06-24 14:14:59 +0200 | [diff] [blame] | 506 | depends on (SUPPORTS_BIG_ENDIAN && MIPS) || MICROBLAZE |
Michal Simek | 89e81e6 | 2022-06-24 14:14:59 +0200 | [diff] [blame] | 507 | |
| 508 | config SYS_LITTLE_ENDIAN |
| 509 | bool "Little endian" |
Michal Simek | 10fd6d6 | 2022-06-24 14:14:59 +0200 | [diff] [blame] | 510 | depends on (SUPPORTS_LITTLE_ENDIAN && MIPS) || MICROBLAZE |
Michal Simek | 89e81e6 | 2022-06-24 14:14:59 +0200 | [diff] [blame] | 511 | |
| 512 | endchoice |
| 513 | |
| 514 | endif |