blob: 5ed17c0a3a51af7681b9c194d51bf42450d7e873 [file] [log] [blame]
Vignesh Raghavendrae16aac32022-05-25 13:38:50 +05301.. SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2.. sectionauthor:: Vignesh Raghavendra <vigneshr@ti.com>
3
Bryan Brattlof0820e112022-12-19 14:29:49 -06004AM62 Platforms
5===============
Vignesh Raghavendrae16aac32022-05-25 13:38:50 +05306
7Introduction:
8-------------
9The AM62 SoC family is the follow on AM335x built on the K3 Multicore
10SoC architecture platform, providing ultra-low-power modes, dual
11display, multi-sensor edge compute, security and other BOM-saving
12integrations. The AM62 SoC targets a broad market to enable
13applications such as Industrial HMI, PLC/CNC/Robot control, Medical
14Equipment, Building Automation, Appliances and more.
15
16Some highlights of this SoC are:
17
18* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster.
19 Pin-to-pin compatible options for single and quad core are available.
20* Cortex-M4F for general-purpose or safety usage.
21* Dual display support, providing 24-bit RBG parallel interface and
22 OLDI/LVDS-4 Lane x2, up to 200MHz pixel clock support for 2K display
23 resolution.
24* Selectable GPU support, up to 8GFLOPS, providing better user experience
25 in 3D graphic display case and Android.
26* PRU(Programmable Realtime Unit) support for customized programmable
27 interfaces/IOs.
28* Integrated Giga-bit Ethernet switch supporting up to a total of two
29 external ports (TSN capable).
30* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, GPMC for
31 NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio,
32 1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals.
33* Dedicated Centralized System Controller for Security, Power, and
34 Resource Management.
35* Multiple low power modes support, ex: Deep sleep, Standby, MCU-only,
36 enabling battery powered system design.
37
38More details can be found in the Technical Reference Manual:
39https://www.ti.com/lit/pdf/spruiv7
40
Nishanth Menon08df7462023-07-27 13:59:00 -050041Platform information:
42
43* https://www.ti.com/tool/SK-AM62B
44
Vignesh Raghavendrae16aac32022-05-25 13:38:50 +053045Boot Flow:
46----------
47Below is the pictorial representation of boot flow:
48
Nishanth Menon68b3baa2023-07-27 13:58:45 -050049.. image:: img/boot_diagram_k3_current.svg
Vignesh Raghavendrae16aac32022-05-25 13:38:50 +053050
51- Here TIFS acts as master and provides all the critical services. R5/A53
52 requests TIFS to get these services done as shown in the above diagram.
53
54Sources:
55--------
Vignesh Raghavendrae16aac32022-05-25 13:38:50 +053056
Marcel Ziswiler7d1a1062023-08-04 12:08:08 +020057.. include:: ../ti/k3.rst
Nishanth Menoncce3e7a2023-07-27 13:58:44 -050058 :start-after: .. k3_rst_include_start_boot_sources
59 :end-before: .. k3_rst_include_end_boot_sources
Vignesh Raghavendrae16aac32022-05-25 13:38:50 +053060
61Build procedure:
62----------------
Nishanth Menonc727b812023-07-27 13:58:48 -0500630. Setup the environment variables:
Vignesh Raghavendrae16aac32022-05-25 13:38:50 +053064
Marcel Ziswiler7d1a1062023-08-04 12:08:08 +020065.. include:: ../ti/k3.rst
Nishanth Menonc727b812023-07-27 13:58:48 -050066 :start-after: .. k3_rst_include_start_common_env_vars_desc
67 :end-before: .. k3_rst_include_end_common_env_vars_desc
68
Marcel Ziswiler7d1a1062023-08-04 12:08:08 +020069.. include:: ../ti/k3.rst
Nishanth Menonc727b812023-07-27 13:58:48 -050070 :start-after: .. k3_rst_include_start_board_env_vars_desc
71 :end-before: .. k3_rst_include_end_board_env_vars_desc
72
73Set the variables corresponding to this platform:
74
Marcel Ziswiler7d1a1062023-08-04 12:08:08 +020075.. include:: ../ti/k3.rst
Nishanth Menonc727b812023-07-27 13:58:48 -050076 :start-after: .. k3_rst_include_start_common_env_vars_defn
77 :end-before: .. k3_rst_include_end_common_env_vars_defn
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +053078.. code-block:: bash
Vignesh Raghavendrae16aac32022-05-25 13:38:50 +053079
Nishanth Menonc727b812023-07-27 13:58:48 -050080 $ export UBOOT_CFG_CORTEXR=am62x_evm_r5_defconfig
81 $ export UBOOT_CFG_CORTEXA=am62x_evm_a53_defconfig
82 $ export TFA_BOARD=lite
83 $ # we dont use any extra TFA parameters
84 $ unset TFA_EXTRA_ARGS
85 $ export OPTEE_PLATFORM=k3-am62x
86 $ export OPTEE_EXTRA_ARGS="CFG_WITH_SOFTWARE_PRNG=y"
87
88.. am62x_evm_rst_include_start_build_steps
89
901. Trusted Firmware-A:
91
Marcel Ziswiler7d1a1062023-08-04 12:08:08 +020092.. include:: ../ti/k3.rst
Nishanth Menonc727b812023-07-27 13:58:48 -050093 :start-after: .. k3_rst_include_start_build_steps_tfa
94 :end-before: .. k3_rst_include_end_build_steps_tfa
95
Vignesh Raghavendrae16aac32022-05-25 13:38:50 +053096
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +0530972. OP-TEE:
Vignesh Raghavendrae16aac32022-05-25 13:38:50 +053098
Marcel Ziswiler7d1a1062023-08-04 12:08:08 +020099.. include:: ../ti/k3.rst
Nishanth Menonc727b812023-07-27 13:58:48 -0500100 :start-after: .. k3_rst_include_start_build_steps_optee
101 :end-before: .. k3_rst_include_end_build_steps_optee
Vignesh Raghavendrae16aac32022-05-25 13:38:50 +0530102
1033. U-Boot:
104
Nishanth Menonc727b812023-07-27 13:58:48 -0500105* 4.1 R5:
Vignesh Raghavendrae16aac32022-05-25 13:38:50 +0530106
Marcel Ziswiler7d1a1062023-08-04 12:08:08 +0200107.. include:: ../ti/k3.rst
Nishanth Menonc727b812023-07-27 13:58:48 -0500108 :start-after: .. k3_rst_include_start_build_steps_spl_r5
109 :end-before: .. k3_rst_include_end_build_steps_spl_r5
Vignesh Raghavendrae16aac32022-05-25 13:38:50 +0530110
Nishanth Menonc727b812023-07-27 13:58:48 -0500111* 4.2 A53:
Vignesh Raghavendrae16aac32022-05-25 13:38:50 +0530112
Marcel Ziswiler7d1a1062023-08-04 12:08:08 +0200113.. include:: ../ti/k3.rst
Nishanth Menonc727b812023-07-27 13:58:48 -0500114 :start-after: .. k3_rst_include_start_build_steps_uboot
115 :end-before: .. k3_rst_include_end_build_steps_uboot
116.. am62x_evm_rst_include_end_build_steps
Vignesh Raghavendrae16aac32022-05-25 13:38:50 +0530117
118Target Images
119--------------
Tom Rinif687c8f2023-07-25 12:44:16 -0400120In order to boot we need tiboot3.bin, tispl.bin and u-boot.img. Each SoC
121variant (GP, HS-FS, HS-SE) requires a different source for these files.
Neha Malcom Francis1ee652a2023-07-22 00:14:43 +0530122
123 - GP
124
125 * tiboot3-am62x-gp-evm.bin from step 3.1
126 * tispl.bin_unsigned, u-boot.img_unsigned from step 3.2
127
128 - HS-FS
129
130 * tiboot3-am62x-hs-fs-evm.bin from step 3.1
131 * tispl.bin, u-boot.img from step 3.2
132
133 - HS-SE
134
135 * tiboot3-am62x-hs-evm.bin from step 3.1
136 * tispl.bin, u-boot.img from step 3.2
Vignesh Raghavendrae16aac32022-05-25 13:38:50 +0530137
138Image formats:
139--------------
140
Nishanth Menon34f76922023-07-27 13:58:52 -0500141- tiboot3.bin
Vignesh Raghavendrae16aac32022-05-25 13:38:50 +0530142
Nishanth Menon34f76922023-07-27 13:58:52 -0500143.. image:: img/multi_cert_tiboot3.bin.svg
Vignesh Raghavendrae16aac32022-05-25 13:38:50 +0530144
145- tispl.bin
146
Nishanth Menon34f76922023-07-27 13:58:52 -0500147.. image:: img/dm_tispl.bin.svg
Judith Mendez354c05f2023-03-31 15:36:15 -0500148
Nikhil M Jaina72532f2023-07-18 14:27:35 +0530149A53 SPL DDR Memory Layout
150-------------------------
151
Nishanth Menond7c3ca92023-07-27 13:58:53 -0500152.. am62x_evm_rst_include_start_ddr_mem_layout
153
Nikhil M Jaina72532f2023-07-18 14:27:35 +0530154This provides an overview memory usage in A53 SPL stage.
155
156.. list-table::
157 :widths: 16 16 16
158 :header-rows: 1
159
160 * - Region
161 - Start Address
162 - End Address
163
164 * - EMPTY
165 - 0x80000000
166 - 0x80080000
167
168 * - TEXT BASE
169 - 0x80080000
170 - 0x800d8000
171
172 * - EMPTY
173 - 0x800d8000
174 - 0x80200000
175
176 * - BMP IMAGE
177 - 0x80200000
178 - 0x80b77660
179
180 * - STACK
181 - 0x80b77660
182 - 0x80b77e60
183
184 * - GD
185 - 0x80b77e60
186 - 0x80b78000
187
188 * - MALLOC
189 - 0x80b78000
190 - 0x80b80000
191
192 * - EMPTY
193 - 0x80b80000
194 - 0x80c80000
195
196 * - BSS
197 - 0x80c80000
198 - 0x80d00000
199
200 * - BLOBS
201 - 0x80d00000
202 - 0x80d00400
203
204 * - EMPTY
205 - 0x80d00400
206 - 0x81000000
Nishanth Menond7c3ca92023-07-27 13:58:53 -0500207.. am62x_evm_rst_include_end_ddr_mem_layout
Nikhil M Jaina72532f2023-07-18 14:27:35 +0530208
Judith Mendez354c05f2023-03-31 15:36:15 -0500209Switch Setting for Boot Mode
210----------------------------
211
212Boot Mode pins provide means to select the boot mode and options before the
213device is powered up. After every POR, they are the main source to populate
214the Boot Parameter Tables.
215
216The following table shows some common boot modes used on AM62 platform. More
217details can be found in the Technical Reference Manual:
218https://www.ti.com/lit/pdf/spruiv7 under the `Boot Mode Pins` section.
219
Nishanth Menon36ed8fb2023-07-27 13:58:54 -0500220.. list-table:: Boot Modes
221 :widths: 16 16 16
222 :header-rows: 1
Judith Mendez354c05f2023-03-31 15:36:15 -0500223
Nishanth Menon36ed8fb2023-07-27 13:58:54 -0500224 * - Switch Label
225 - SW2: 12345678
226 - SW3: 12345678
227
228 * - SD
229 - 01000000
230 - 11000010
231
232 * - OSPI
233 - 00000000
234 - 11001110
235
236 * - EMMC
237 - 00000000
238 - 11010010
239
240 * - UART
241 - 00000000
242 - 11011100
243
244 * - USB DFU
245 - 00000000
246 - 11001010
Judith Mendez354c05f2023-03-31 15:36:15 -0500247
248For SW2 and SW1, the switch state in the "ON" position = 1.
Jason Kacineseffe5082023-08-03 01:29:22 -0500249
250Debugging U-Boot
251----------------
252
253See :ref:`Common Debugging environment - OpenOCD<k3_rst_refer_openocd>`: for
254detailed setup information.
255
256.. warning::
257
258 **OpenOCD support since**: v0.12.0
259
260 If the default package version of OpenOCD in your development
261 environment's distribution needs to be updated, it might be necessary to
262 build OpenOCD from the source.
263
264.. include:: k3.rst
265 :start-after: .. k3_rst_include_start_openocd_connect_XDS110
266 :end-before: .. k3_rst_include_end_openocd_connect_XDS110
267
268To start OpenOCD and connect to the board
269
270.. code-block:: bash
271
272 openocd -f board/ti_am625evm.cfg