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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Andy Fleming5f184712011-04-08 02:10:27 -05002/*
3 * Generic PHY Management code
4 *
Andy Fleming5f184712011-04-08 02:10:27 -05005 * Copyright 2011 Freescale Semiconductor, Inc.
6 * author Andy Fleming
7 *
8 * Based loosely off of Linux's PHY Lib
9 */
Andy Fleming5f184712011-04-08 02:10:27 -050010#include <common.h>
Simon Glass24b852a2015-11-08 23:47:45 -070011#include <console.h>
Simon Glassc74c8e62015-04-05 16:07:39 -060012#include <dm.h>
Andy Fleming5f184712011-04-08 02:10:27 -050013#include <malloc.h>
14#include <net.h>
15#include <command.h>
16#include <miiphy.h>
17#include <phy.h>
18#include <errno.h>
Troy Kisky1adb4062012-10-22 16:40:43 +000019#include <linux/err.h>
Shengzhou Liu597fe042014-04-11 16:14:17 +080020#include <linux/compiler.h>
Andy Fleming5f184712011-04-08 02:10:27 -050021
Michal Simekabbfcbe2015-05-13 13:40:40 +020022DECLARE_GLOBAL_DATA_PTR;
23
Andy Fleming5f184712011-04-08 02:10:27 -050024/* Generic PHY support and helper functions */
25
26/**
Mario Six8d631202018-01-15 11:08:27 +010027 * genphy_config_advert - sanitize and advertise auto-negotiation parameters
Andy Fleming5f184712011-04-08 02:10:27 -050028 * @phydev: target phy_device struct
29 *
30 * Description: Writes MII_ADVERTISE with the appropriate values,
31 * after sanitizing the values to make sure we only advertise
32 * what is supported. Returns < 0 on error, 0 if the PHY's advertisement
33 * hasn't changed, and > 0 if it has changed.
34 */
Kim Phillips960d70c2012-10-29 13:34:34 +000035static int genphy_config_advert(struct phy_device *phydev)
Andy Fleming5f184712011-04-08 02:10:27 -050036{
37 u32 advertise;
Florian Fainellibbdcaff2016-01-13 16:59:31 +030038 int oldadv, adv, bmsr;
Andy Fleming5f184712011-04-08 02:10:27 -050039 int err, changed = 0;
40
Florian Fainellibbdcaff2016-01-13 16:59:31 +030041 /* Only allow advertising what this PHY supports */
Andy Fleming5f184712011-04-08 02:10:27 -050042 phydev->advertising &= phydev->supported;
43 advertise = phydev->advertising;
44
45 /* Setup standard advertisement */
Florian Fainellibbdcaff2016-01-13 16:59:31 +030046 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
47 oldadv = adv;
Andy Fleming5f184712011-04-08 02:10:27 -050048
49 if (adv < 0)
50 return adv;
51
52 adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP |
53 ADVERTISE_PAUSE_ASYM);
54 if (advertise & ADVERTISED_10baseT_Half)
55 adv |= ADVERTISE_10HALF;
56 if (advertise & ADVERTISED_10baseT_Full)
57 adv |= ADVERTISE_10FULL;
58 if (advertise & ADVERTISED_100baseT_Half)
59 adv |= ADVERTISE_100HALF;
60 if (advertise & ADVERTISED_100baseT_Full)
61 adv |= ADVERTISE_100FULL;
62 if (advertise & ADVERTISED_Pause)
63 adv |= ADVERTISE_PAUSE_CAP;
64 if (advertise & ADVERTISED_Asym_Pause)
65 adv |= ADVERTISE_PAUSE_ASYM;
Charles Coldwellde1d7862013-02-21 08:25:52 -050066 if (advertise & ADVERTISED_1000baseX_Half)
67 adv |= ADVERTISE_1000XHALF;
68 if (advertise & ADVERTISED_1000baseX_Full)
69 adv |= ADVERTISE_1000XFULL;
Andy Fleming5f184712011-04-08 02:10:27 -050070
71 if (adv != oldadv) {
72 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv);
73
74 if (err < 0)
75 return err;
76 changed = 1;
77 }
78
Florian Fainellibbdcaff2016-01-13 16:59:31 +030079 bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
80 if (bmsr < 0)
81 return bmsr;
82
83 /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all
84 * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a
85 * logical 1.
86 */
87 if (!(bmsr & BMSR_ESTATEN))
88 return changed;
89
Andy Fleming5f184712011-04-08 02:10:27 -050090 /* Configure gigabit if it's supported */
Florian Fainellibbdcaff2016-01-13 16:59:31 +030091 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
92 oldadv = adv;
93
94 if (adv < 0)
95 return adv;
96
97 adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
98
Andy Fleming5f184712011-04-08 02:10:27 -050099 if (phydev->supported & (SUPPORTED_1000baseT_Half |
100 SUPPORTED_1000baseT_Full)) {
Andy Fleming5f184712011-04-08 02:10:27 -0500101 if (advertise & SUPPORTED_1000baseT_Half)
102 adv |= ADVERTISE_1000HALF;
103 if (advertise & SUPPORTED_1000baseT_Full)
104 adv |= ADVERTISE_1000FULL;
Andy Fleming5f184712011-04-08 02:10:27 -0500105 }
106
Florian Fainellibbdcaff2016-01-13 16:59:31 +0300107 if (adv != oldadv)
108 changed = 1;
109
110 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
111 if (err < 0)
112 return err;
113
Andy Fleming5f184712011-04-08 02:10:27 -0500114 return changed;
115}
116
Andy Fleming5f184712011-04-08 02:10:27 -0500117/**
118 * genphy_setup_forced - configures/forces speed/duplex from @phydev
119 * @phydev: target phy_device struct
120 *
121 * Description: Configures MII_BMCR to force speed/duplex
122 * to the values in phydev. Assumes that the values are valid.
123 */
Kim Phillips960d70c2012-10-29 13:34:34 +0000124static int genphy_setup_forced(struct phy_device *phydev)
Andy Fleming5f184712011-04-08 02:10:27 -0500125{
126 int err;
Alexandre Messier53b0c382016-01-22 14:16:15 -0500127 int ctl = BMCR_ANRESTART;
Andy Fleming5f184712011-04-08 02:10:27 -0500128
Mario Six8d631202018-01-15 11:08:27 +0100129 phydev->pause = 0;
130 phydev->asym_pause = 0;
Andy Fleming5f184712011-04-08 02:10:27 -0500131
Mario Six8d631202018-01-15 11:08:27 +0100132 if (phydev->speed == SPEED_1000)
Andy Fleming5f184712011-04-08 02:10:27 -0500133 ctl |= BMCR_SPEED1000;
Mario Six8d631202018-01-15 11:08:27 +0100134 else if (phydev->speed == SPEED_100)
Andy Fleming5f184712011-04-08 02:10:27 -0500135 ctl |= BMCR_SPEED100;
136
Mario Six8d631202018-01-15 11:08:27 +0100137 if (phydev->duplex == DUPLEX_FULL)
Andy Fleming5f184712011-04-08 02:10:27 -0500138 ctl |= BMCR_FULLDPLX;
139
140 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
141
142 return err;
143}
144
Andy Fleming5f184712011-04-08 02:10:27 -0500145/**
146 * genphy_restart_aneg - Enable and Restart Autonegotiation
147 * @phydev: target phy_device struct
148 */
149int genphy_restart_aneg(struct phy_device *phydev)
150{
151 int ctl;
152
153 ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
154
155 if (ctl < 0)
156 return ctl;
157
158 ctl |= (BMCR_ANENABLE | BMCR_ANRESTART);
159
160 /* Don't isolate the PHY if we're negotiating */
161 ctl &= ~(BMCR_ISOLATE);
162
163 ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl);
164
165 return ctl;
166}
167
Andy Fleming5f184712011-04-08 02:10:27 -0500168/**
169 * genphy_config_aneg - restart auto-negotiation or write BMCR
170 * @phydev: target phy_device struct
171 *
172 * Description: If auto-negotiation is enabled, we configure the
173 * advertising, and then restart auto-negotiation. If it is not
174 * enabled, then we write the BMCR.
175 */
176int genphy_config_aneg(struct phy_device *phydev)
177{
178 int result;
179
Mario Six8d631202018-01-15 11:08:27 +0100180 if (phydev->autoneg != AUTONEG_ENABLE)
Andy Fleming5f184712011-04-08 02:10:27 -0500181 return genphy_setup_forced(phydev);
182
183 result = genphy_config_advert(phydev);
184
185 if (result < 0) /* error */
186 return result;
187
188 if (result == 0) {
Mario Six8d631202018-01-15 11:08:27 +0100189 /*
190 * Advertisment hasn't changed, but maybe aneg was never on to
191 * begin with? Or maybe phy was isolated?
192 */
Andy Fleming5f184712011-04-08 02:10:27 -0500193 int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
194
195 if (ctl < 0)
196 return ctl;
197
198 if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE))
199 result = 1; /* do restart aneg */
200 }
201
Mario Six8d631202018-01-15 11:08:27 +0100202 /*
203 * Only restart aneg if we are advertising something different
204 * than we were before.
205 */
Andy Fleming5f184712011-04-08 02:10:27 -0500206 if (result > 0)
207 result = genphy_restart_aneg(phydev);
208
209 return result;
210}
211
212/**
213 * genphy_update_link - update link status in @phydev
214 * @phydev: target phy_device struct
215 *
216 * Description: Update the value in phydev->link to reflect the
217 * current link value. In order to do this, we need to read
218 * the status register twice, keeping the second value.
219 */
220int genphy_update_link(struct phy_device *phydev)
221{
222 unsigned int mii_reg;
223
224 /*
225 * Wait if the link is up, and autonegotiation is in progress
226 * (ie - we're capable and it's not done)
227 */
228 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
229
230 /*
231 * If we already saw the link up, and it hasn't gone down, then
232 * we don't need to wait for autoneg again
233 */
234 if (phydev->link && mii_reg & BMSR_LSTATUS)
235 return 0;
236
Alexandre Messier1f9e6722016-01-22 14:16:56 -0500237 if ((phydev->autoneg == AUTONEG_ENABLE) &&
238 !(mii_reg & BMSR_ANEGCOMPLETE)) {
Andy Fleming5f184712011-04-08 02:10:27 -0500239 int i = 0;
240
241 printf("%s Waiting for PHY auto negotiation to complete",
Mario Six8d631202018-01-15 11:08:27 +0100242 phydev->dev->name);
Andy Fleming5f184712011-04-08 02:10:27 -0500243 while (!(mii_reg & BMSR_ANEGCOMPLETE)) {
244 /*
245 * Timeout reached ?
246 */
247 if (i > PHY_ANEG_TIMEOUT) {
248 printf(" TIMEOUT !\n");
249 phydev->link = 0;
Michal Simekef5e8212016-05-18 12:48:57 +0200250 return -ETIMEDOUT;
Andy Fleming5f184712011-04-08 02:10:27 -0500251 }
252
253 if (ctrlc()) {
254 puts("user interrupt!\n");
255 phydev->link = 0;
256 return -EINTR;
257 }
258
259 if ((i++ % 500) == 0)
260 printf(".");
261
262 udelay(1000); /* 1 ms */
263 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
264 }
265 printf(" done\n");
266 phydev->link = 1;
267 } else {
268 /* Read the link a second time to clear the latched state */
269 mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
270
271 if (mii_reg & BMSR_LSTATUS)
272 phydev->link = 1;
273 else
274 phydev->link = 0;
275 }
276
277 return 0;
278}
279
280/*
281 * Generic function which updates the speed and duplex. If
282 * autonegotiation is enabled, it uses the AND of the link
283 * partner's advertised capabilities and our advertised
284 * capabilities. If autonegotiation is disabled, we use the
285 * appropriate bits in the control register.
286 *
287 * Stolen from Linux's mii.c and phy_device.c
288 */
Yegor Yefremove2043f52012-11-28 11:15:17 +0100289int genphy_parse_link(struct phy_device *phydev)
Andy Fleming5f184712011-04-08 02:10:27 -0500290{
291 int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
292
293 /* We're using autonegotiation */
Alexandre Messier1f9e6722016-01-22 14:16:56 -0500294 if (phydev->autoneg == AUTONEG_ENABLE) {
Andy Fleming5f184712011-04-08 02:10:27 -0500295 u32 lpa = 0;
Heiko Schocherf6d1f6e2013-07-23 15:32:36 +0200296 int gblpa = 0;
Charles Coldwellde1d7862013-02-21 08:25:52 -0500297 u32 estatus = 0;
Andy Fleming5f184712011-04-08 02:10:27 -0500298
299 /* Check for gigabit capability */
David Dueck3a530d12013-11-05 17:23:02 +0100300 if (phydev->supported & (SUPPORTED_1000baseT_Full |
301 SUPPORTED_1000baseT_Half)) {
Andy Fleming5f184712011-04-08 02:10:27 -0500302 /* We want a list of states supported by
303 * both PHYs in the link
304 */
305 gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000);
Heiko Schocherf6d1f6e2013-07-23 15:32:36 +0200306 if (gblpa < 0) {
Mario Six8d631202018-01-15 11:08:27 +0100307 debug("Could not read MII_STAT1000. ");
308 debug("Ignoring gigabit capability\n");
Heiko Schocherf6d1f6e2013-07-23 15:32:36 +0200309 gblpa = 0;
310 }
Andy Fleming5f184712011-04-08 02:10:27 -0500311 gblpa &= phy_read(phydev,
312 MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
313 }
314
315 /* Set the baseline so we only have to set them
316 * if they're different
317 */
318 phydev->speed = SPEED_10;
319 phydev->duplex = DUPLEX_HALF;
320
321 /* Check the gigabit fields */
322 if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) {
323 phydev->speed = SPEED_1000;
324
325 if (gblpa & PHY_1000BTSR_1000FD)
326 phydev->duplex = DUPLEX_FULL;
327
328 /* We're done! */
329 return 0;
330 }
331
332 lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE);
333 lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA);
334
Wolfgang Denk0dcfb0f2011-09-28 21:02:43 +0200335 if (lpa & (LPA_100FULL | LPA_100HALF)) {
Andy Fleming5f184712011-04-08 02:10:27 -0500336 phydev->speed = SPEED_100;
337
Wolfgang Denk0dcfb0f2011-09-28 21:02:43 +0200338 if (lpa & LPA_100FULL)
339 phydev->duplex = DUPLEX_FULL;
340
Mario Six8d631202018-01-15 11:08:27 +0100341 } else if (lpa & LPA_10FULL) {
Andy Fleming5f184712011-04-08 02:10:27 -0500342 phydev->duplex = DUPLEX_FULL;
Mario Six8d631202018-01-15 11:08:27 +0100343 }
Charles Coldwellde1d7862013-02-21 08:25:52 -0500344
Sascha Silbe9ba30f62013-07-19 12:25:10 +0200345 /*
346 * Extended status may indicate that the PHY supports
347 * 1000BASE-T/X even though the 1000BASE-T registers
348 * are missing. In this case we can't tell whether the
349 * peer also supports it, so we only check extended
350 * status if the 1000BASE-T registers are actually
351 * missing.
352 */
353 if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP))
Charles Coldwellde1d7862013-02-21 08:25:52 -0500354 estatus = phy_read(phydev, MDIO_DEVAD_NONE,
355 MII_ESTATUS);
356
357 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF |
358 ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) {
359 phydev->speed = SPEED_1000;
360 if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL))
361 phydev->duplex = DUPLEX_FULL;
362 }
363
Andy Fleming5f184712011-04-08 02:10:27 -0500364 } else {
365 u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR);
366
367 phydev->speed = SPEED_10;
368 phydev->duplex = DUPLEX_HALF;
369
370 if (bmcr & BMCR_FULLDPLX)
371 phydev->duplex = DUPLEX_FULL;
372
373 if (bmcr & BMCR_SPEED1000)
374 phydev->speed = SPEED_1000;
375 else if (bmcr & BMCR_SPEED100)
376 phydev->speed = SPEED_100;
377 }
378
379 return 0;
380}
381
382int genphy_config(struct phy_device *phydev)
383{
384 int val;
385 u32 features;
386
Andy Fleming5f184712011-04-08 02:10:27 -0500387 features = (SUPPORTED_TP | SUPPORTED_MII
388 | SUPPORTED_AUI | SUPPORTED_FIBRE |
389 SUPPORTED_BNC);
390
391 /* Do we support autonegotiation? */
392 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR);
393
394 if (val < 0)
395 return val;
396
397 if (val & BMSR_ANEGCAPABLE)
398 features |= SUPPORTED_Autoneg;
399
400 if (val & BMSR_100FULL)
401 features |= SUPPORTED_100baseT_Full;
402 if (val & BMSR_100HALF)
403 features |= SUPPORTED_100baseT_Half;
404 if (val & BMSR_10FULL)
405 features |= SUPPORTED_10baseT_Full;
406 if (val & BMSR_10HALF)
407 features |= SUPPORTED_10baseT_Half;
408
409 if (val & BMSR_ESTATEN) {
410 val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS);
411
412 if (val < 0)
413 return val;
414
415 if (val & ESTATUS_1000_TFULL)
416 features |= SUPPORTED_1000baseT_Full;
417 if (val & ESTATUS_1000_THALF)
418 features |= SUPPORTED_1000baseT_Half;
Charles Coldwellde1d7862013-02-21 08:25:52 -0500419 if (val & ESTATUS_1000_XFULL)
420 features |= SUPPORTED_1000baseX_Full;
421 if (val & ESTATUS_1000_XHALF)
Fabio Estevam9a5dad22013-07-19 10:01:34 -0300422 features |= SUPPORTED_1000baseX_Half;
Andy Fleming5f184712011-04-08 02:10:27 -0500423 }
424
Sascha Hauer44bc3172016-01-13 16:59:32 +0300425 phydev->supported &= features;
426 phydev->advertising &= features;
Andy Fleming5f184712011-04-08 02:10:27 -0500427
428 genphy_config_aneg(phydev);
429
430 return 0;
431}
432
433int genphy_startup(struct phy_device *phydev)
434{
Michal Simekb733c272016-05-18 12:46:12 +0200435 int ret;
Andy Fleming5f184712011-04-08 02:10:27 -0500436
Michal Simekb733c272016-05-18 12:46:12 +0200437 ret = genphy_update_link(phydev);
438 if (ret)
439 return ret;
440
441 return genphy_parse_link(phydev);
Andy Fleming5f184712011-04-08 02:10:27 -0500442}
443
444int genphy_shutdown(struct phy_device *phydev)
445{
446 return 0;
447}
448
449static struct phy_driver genphy_driver = {
450 .uid = 0xffffffff,
451 .mask = 0xffffffff,
452 .name = "Generic PHY",
Sascha Hauer44bc3172016-01-13 16:59:32 +0300453 .features = PHY_GBIT_FEATURES | SUPPORTED_MII |
454 SUPPORTED_AUI | SUPPORTED_FIBRE |
455 SUPPORTED_BNC,
Andy Fleming5f184712011-04-08 02:10:27 -0500456 .config = genphy_config,
457 .startup = genphy_startup,
458 .shutdown = genphy_shutdown,
459};
460
461static LIST_HEAD(phy_drivers);
462
463int phy_init(void)
464{
Siva Durga Prasad Paladuguc689c482019-03-04 16:01:30 +0100465#ifdef CONFIG_NEEDS_MANUAL_RELOC
466 /*
467 * The pointers inside phy_drivers also needs to be updated incase of
468 * manual reloc, without which these points to some invalid
469 * pre reloc address and leads to invalid accesses, hangs.
470 */
471 struct list_head *head = &phy_drivers;
472
473 head->next = (void *)head->next + gd->reloc_off;
474 head->prev = (void *)head->prev + gd->reloc_off;
475#endif
476
Florian Fainelli137963d2017-12-09 14:59:54 -0800477#ifdef CONFIG_B53_SWITCH
478 phy_b53_init();
479#endif
Kevin Smith24ae3962016-03-31 19:33:12 +0000480#ifdef CONFIG_MV88E61XX_SWITCH
481 phy_mv88e61xx_init();
482#endif
Shaohui Xief7c38cf2014-12-30 18:32:04 +0800483#ifdef CONFIG_PHY_AQUANTIA
484 phy_aquantia_init();
485#endif
Andy Fleming9082eea2011-04-07 21:56:05 -0500486#ifdef CONFIG_PHY_ATHEROS
487 phy_atheros_init();
488#endif
489#ifdef CONFIG_PHY_BROADCOM
490 phy_broadcom_init();
491#endif
Shengzhou Liu9b18e512014-11-10 18:32:29 +0800492#ifdef CONFIG_PHY_CORTINA
493 phy_cortina_init();
494#endif
Andy Fleming9082eea2011-04-07 21:56:05 -0500495#ifdef CONFIG_PHY_DAVICOM
496 phy_davicom_init();
497#endif
Matt Porterf485c8a2013-03-20 05:38:13 +0000498#ifdef CONFIG_PHY_ET1011C
499 phy_et1011c_init();
500#endif
Andy Fleming9082eea2011-04-07 21:56:05 -0500501#ifdef CONFIG_PHY_LXT
502 phy_lxt_init();
503#endif
504#ifdef CONFIG_PHY_MARVELL
505 phy_marvell_init();
506#endif
Alexandru Gagniucd397f7c2017-07-07 11:36:57 -0700507#ifdef CONFIG_PHY_MICREL_KSZ8XXX
508 phy_micrel_ksz8xxx_init();
509#endif
510#ifdef CONFIG_PHY_MICREL_KSZ90X1
511 phy_micrel_ksz90x1_init();
Andy Fleming9082eea2011-04-07 21:56:05 -0500512#endif
Neil Armstrong8995a962017-10-18 10:02:10 +0200513#ifdef CONFIG_PHY_MESON_GXL
514 phy_meson_gxl_init();
515#endif
Andy Fleming9082eea2011-04-07 21:56:05 -0500516#ifdef CONFIG_PHY_NATSEMI
517 phy_natsemi_init();
518#endif
519#ifdef CONFIG_PHY_REALTEK
520 phy_realtek_init();
521#endif
Nobuhiro Iwamatsu5751aa22011-11-23 21:24:15 +0000522#ifdef CONFIG_PHY_SMSC
523 phy_smsc_init();
524#endif
Andy Fleming9082eea2011-04-07 21:56:05 -0500525#ifdef CONFIG_PHY_TERANETICS
526 phy_teranetics_init();
527#endif
Edgar E. Iglesias721aed72015-09-25 23:46:08 -0700528#ifdef CONFIG_PHY_TI
529 phy_ti_init();
530#endif
Andy Fleming9082eea2011-04-07 21:56:05 -0500531#ifdef CONFIG_PHY_VITESSE
532 phy_vitesse_init();
533#endif
Siva Durga Prasad Paladugued6fad32016-02-05 13:22:10 +0530534#ifdef CONFIG_PHY_XILINX
535 phy_xilinx_init();
536#endif
John Haechtena5fd13a2016-12-09 22:15:17 +0000537#ifdef CONFIG_PHY_MSCC
538 phy_mscc_init();
539#endif
Hannes Schmelzerdb40c1a2017-03-23 15:11:43 +0100540#ifdef CONFIG_PHY_FIXED
541 phy_fixed_init();
542#endif
Andy Fleming5f184712011-04-08 02:10:27 -0500543 return 0;
544}
545
546int phy_register(struct phy_driver *drv)
547{
548 INIT_LIST_HEAD(&drv->list);
549 list_add_tail(&drv->list, &phy_drivers);
550
Michal Simekabbfcbe2015-05-13 13:40:40 +0200551#ifdef CONFIG_NEEDS_MANUAL_RELOC
552 if (drv->probe)
553 drv->probe += gd->reloc_off;
554 if (drv->config)
555 drv->config += gd->reloc_off;
556 if (drv->startup)
557 drv->startup += gd->reloc_off;
558 if (drv->shutdown)
559 drv->shutdown += gd->reloc_off;
560 if (drv->readext)
561 drv->readext += gd->reloc_off;
562 if (drv->writeext)
563 drv->writeext += gd->reloc_off;
Carlo Caione4f6746d2019-02-08 17:25:06 +0000564 if (drv->read_mmd)
565 drv->read_mmd += gd->reloc_off;
566 if (drv->write_mmd)
567 drv->write_mmd += gd->reloc_off;
Michal Simekabbfcbe2015-05-13 13:40:40 +0200568#endif
Andy Fleming5f184712011-04-08 02:10:27 -0500569 return 0;
570}
571
Alexey Brodkinb18acb02016-01-13 16:59:34 +0300572int phy_set_supported(struct phy_device *phydev, u32 max_speed)
573{
574 /* The default values for phydev->supported are provided by the PHY
575 * driver "features" member, we want to reset to sane defaults first
576 * before supporting higher speeds.
577 */
578 phydev->supported &= PHY_DEFAULT_FEATURES;
579
580 switch (max_speed) {
581 default:
582 return -ENOTSUPP;
583 case SPEED_1000:
584 phydev->supported |= PHY_1000BT_FEATURES;
585 /* fall through */
586 case SPEED_100:
587 phydev->supported |= PHY_100BT_FEATURES;
588 /* fall through */
589 case SPEED_10:
590 phydev->supported |= PHY_10BT_FEATURES;
591 }
592
593 return 0;
594}
595
Kim Phillips960d70c2012-10-29 13:34:34 +0000596static int phy_probe(struct phy_device *phydev)
Andy Fleming5f184712011-04-08 02:10:27 -0500597{
598 int err = 0;
599
Mario Six8d631202018-01-15 11:08:27 +0100600 phydev->advertising = phydev->drv->features;
601 phydev->supported = phydev->drv->features;
602
Andy Fleming5f184712011-04-08 02:10:27 -0500603 phydev->mmds = phydev->drv->mmds;
604
605 if (phydev->drv->probe)
606 err = phydev->drv->probe(phydev);
607
608 return err;
609}
610
611static struct phy_driver *generic_for_interface(phy_interface_t interface)
612{
613#ifdef CONFIG_PHYLIB_10G
614 if (is_10g_interface(interface))
615 return &gen10g_driver;
616#endif
617
618 return &genphy_driver;
619}
620
Kim Phillips960d70c2012-10-29 13:34:34 +0000621static struct phy_driver *get_phy_driver(struct phy_device *phydev,
Mario Six8d631202018-01-15 11:08:27 +0100622 phy_interface_t interface)
Andy Fleming5f184712011-04-08 02:10:27 -0500623{
624 struct list_head *entry;
625 int phy_id = phydev->phy_id;
626 struct phy_driver *drv = NULL;
627
628 list_for_each(entry, &phy_drivers) {
629 drv = list_entry(entry, struct phy_driver, list);
630 if ((drv->uid & drv->mask) == (phy_id & drv->mask))
631 return drv;
632 }
633
634 /* If we made it here, there's no driver for this PHY */
635 return generic_for_interface(interface);
636}
637
Kim Phillips960d70c2012-10-29 13:34:34 +0000638static struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
Pankaj Bansalb3eabd82018-11-16 06:26:18 +0000639 u32 phy_id, bool is_c45,
Kim Phillips960d70c2012-10-29 13:34:34 +0000640 phy_interface_t interface)
Andy Fleming5f184712011-04-08 02:10:27 -0500641{
642 struct phy_device *dev;
643
Mario Six8d631202018-01-15 11:08:27 +0100644 /*
645 * We allocate the device, and initialize the
646 * default values
647 */
Andy Fleming5f184712011-04-08 02:10:27 -0500648 dev = malloc(sizeof(*dev));
649 if (!dev) {
650 printf("Failed to allocate PHY device for %s:%d\n",
Mario Six8d631202018-01-15 11:08:27 +0100651 bus->name, addr);
Andy Fleming5f184712011-04-08 02:10:27 -0500652 return NULL;
653 }
654
655 memset(dev, 0, sizeof(*dev));
656
657 dev->duplex = -1;
Mugunthan V N26d3acd2015-09-03 15:50:21 +0530658 dev->link = 0;
Andy Fleming5f184712011-04-08 02:10:27 -0500659 dev->interface = interface;
660
Grygorii Strashkoeef0b8a2018-07-05 12:02:48 -0500661#ifdef CONFIG_DM_ETH
662 dev->node = ofnode_null();
663#endif
664
Andy Fleming5f184712011-04-08 02:10:27 -0500665 dev->autoneg = AUTONEG_ENABLE;
666
667 dev->addr = addr;
668 dev->phy_id = phy_id;
Pankaj Bansalb3eabd82018-11-16 06:26:18 +0000669 dev->is_c45 = is_c45;
Andy Fleming5f184712011-04-08 02:10:27 -0500670 dev->bus = bus;
671
672 dev->drv = get_phy_driver(dev, interface);
673
Siva Durga Prasad Paladugu05eb6a62019-03-04 16:02:11 +0100674 if (phy_probe(dev)) {
675 printf("%s, PHY probe failed\n", __func__);
676 return NULL;
677 }
Andy Fleming5f184712011-04-08 02:10:27 -0500678
Michal Simek7b4ea2d2018-12-19 16:57:38 +0100679 if (addr >= 0 && addr < PHY_MAX_ADDR)
680 bus->phymap[addr] = dev;
Andy Fleming5f184712011-04-08 02:10:27 -0500681
682 return dev;
683}
684
685/**
686 * get_phy_id - reads the specified addr for its ID.
687 * @bus: the target MII bus
688 * @addr: PHY address on the MII bus
689 * @phy_id: where to store the ID retrieved.
690 *
691 * Description: Reads the ID registers of the PHY at @addr on the
692 * @bus, stores it in @phy_id and returns zero on success.
693 */
Shengzhou Liu5707d5f2015-04-07 18:46:32 +0800694int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id)
Andy Fleming5f184712011-04-08 02:10:27 -0500695{
696 int phy_reg;
697
Mario Six8d631202018-01-15 11:08:27 +0100698 /*
699 * Grab the bits from PHYIR1, and put them
700 * in the upper half
701 */
Andy Fleming5f184712011-04-08 02:10:27 -0500702 phy_reg = bus->read(bus, addr, devad, MII_PHYSID1);
703
704 if (phy_reg < 0)
705 return -EIO;
706
707 *phy_id = (phy_reg & 0xffff) << 16;
708
709 /* Grab the bits from PHYIR2, and put them in the lower half */
710 phy_reg = bus->read(bus, addr, devad, MII_PHYSID2);
711
712 if (phy_reg < 0)
713 return -EIO;
714
715 *phy_id |= (phy_reg & 0xffff);
716
717 return 0;
718}
719
Troy Kisky1adb4062012-10-22 16:40:43 +0000720static struct phy_device *create_phy_by_mask(struct mii_dev *bus,
Mario Six8d631202018-01-15 11:08:27 +0100721 uint phy_mask, int devad,
722 phy_interface_t interface)
Troy Kisky1adb4062012-10-22 16:40:43 +0000723{
724 u32 phy_id = 0xffffffff;
Pankaj Bansalb3eabd82018-11-16 06:26:18 +0000725 bool is_c45;
Mario Six8d631202018-01-15 11:08:27 +0100726
Troy Kisky1adb4062012-10-22 16:40:43 +0000727 while (phy_mask) {
728 int addr = ffs(phy_mask) - 1;
729 int r = get_phy_id(bus, addr, devad, &phy_id);
Alex Marginean3bf135b2019-07-05 12:28:55 +0300730
731 /*
732 * If the PHY ID is flat 0 we ignore it. There are C45 PHYs
733 * that return all 0s for C22 reads (like Aquantia AQR112) and
734 * there are C22 PHYs that return all 0s for C45 reads (like
735 * Atheros AR8035).
736 */
737 if (r == 0 && phy_id == 0)
738 goto next;
739
Troy Kisky1adb4062012-10-22 16:40:43 +0000740 /* If the PHY ID is mostly f's, we didn't find anything */
Pankaj Bansalb3eabd82018-11-16 06:26:18 +0000741 if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) {
742 is_c45 = (devad == MDIO_DEVAD_NONE) ? false : true;
743 return phy_device_create(bus, addr, phy_id, is_c45,
744 interface);
745 }
Alex Marginean3bf135b2019-07-05 12:28:55 +0300746next:
Troy Kisky1adb4062012-10-22 16:40:43 +0000747 phy_mask &= ~(1 << addr);
748 }
749 return NULL;
750}
751
752static struct phy_device *search_for_existing_phy(struct mii_dev *bus,
Mario Six8d631202018-01-15 11:08:27 +0100753 uint phy_mask,
754 phy_interface_t interface)
Troy Kisky1adb4062012-10-22 16:40:43 +0000755{
756 /* If we have one, return the existing device, with new interface */
757 while (phy_mask) {
758 int addr = ffs(phy_mask) - 1;
Mario Six8d631202018-01-15 11:08:27 +0100759
Troy Kisky1adb4062012-10-22 16:40:43 +0000760 if (bus->phymap[addr]) {
761 bus->phymap[addr]->interface = interface;
762 return bus->phymap[addr];
763 }
764 phy_mask &= ~(1 << addr);
765 }
766 return NULL;
767}
768
769static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus,
Mario Six8d631202018-01-15 11:08:27 +0100770 uint phy_mask,
771 phy_interface_t interface)
Troy Kisky1adb4062012-10-22 16:40:43 +0000772{
773 int i;
774 struct phy_device *phydev;
775
776 phydev = search_for_existing_phy(bus, phy_mask, interface);
777 if (phydev)
778 return phydev;
779 /* Try Standard (ie Clause 22) access */
780 /* Otherwise we have to try Clause 45 */
781 for (i = 0; i < 5; i++) {
782 phydev = create_phy_by_mask(bus, phy_mask,
Mario Six8d631202018-01-15 11:08:27 +0100783 i ? i : MDIO_DEVAD_NONE, interface);
Troy Kisky1adb4062012-10-22 16:40:43 +0000784 if (IS_ERR(phydev))
785 return NULL;
786 if (phydev)
787 return phydev;
788 }
Bin Meng3e1949d2015-10-07 21:19:30 -0700789
790 debug("\n%s PHY: ", bus->name);
791 while (phy_mask) {
792 int addr = ffs(phy_mask) - 1;
Mario Six8d631202018-01-15 11:08:27 +0100793
Bin Meng3e1949d2015-10-07 21:19:30 -0700794 debug("%d ", addr);
795 phy_mask &= ~(1 << addr);
796 }
797 debug("not found\n");
Bin Meng0132b9a2015-10-07 21:19:29 -0700798
799 return NULL;
Troy Kisky1adb4062012-10-22 16:40:43 +0000800}
801
Andy Fleming5f184712011-04-08 02:10:27 -0500802/**
Mario Six8d631202018-01-15 11:08:27 +0100803 * get_phy_device - reads the specified PHY device and returns its
804 * @phy_device struct
Andy Fleming5f184712011-04-08 02:10:27 -0500805 * @bus: the target MII bus
806 * @addr: PHY address on the MII bus
807 *
808 * Description: Reads the ID registers of the PHY at @addr on the
809 * @bus, then allocates and returns the phy_device to represent it.
810 */
Kim Phillips960d70c2012-10-29 13:34:34 +0000811static struct phy_device *get_phy_device(struct mii_dev *bus, int addr,
812 phy_interface_t interface)
Andy Fleming5f184712011-04-08 02:10:27 -0500813{
Troy Kisky1adb4062012-10-22 16:40:43 +0000814 return get_phy_device_by_mask(bus, 1 << addr, interface);
Andy Fleming5f184712011-04-08 02:10:27 -0500815}
816
817int phy_reset(struct phy_device *phydev)
818{
819 int reg;
820 int timeout = 500;
821 int devad = MDIO_DEVAD_NONE;
822
Shaohui Xieddcd1f32016-01-28 15:55:46 +0800823 if (phydev->flags & PHY_FLAG_BROKEN_RESET)
824 return 0;
825
Andy Fleming5f184712011-04-08 02:10:27 -0500826#ifdef CONFIG_PHYLIB_10G
827 /* If it's 10G, we need to issue reset through one of the MMDs */
828 if (is_10g_interface(phydev->interface)) {
829 if (!phydev->mmds)
830 gen10g_discover_mmds(phydev);
831
832 devad = ffs(phydev->mmds) - 1;
833 }
834#endif
835
Stefan Agnera0580522015-12-09 11:21:25 -0800836 if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) {
Andy Fleming5f184712011-04-08 02:10:27 -0500837 debug("PHY reset failed\n");
838 return -1;
839 }
840
841#ifdef CONFIG_PHY_RESET_DELAY
842 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
843#endif
844 /*
845 * Poll the control register for the reset bit to go to 0 (it is
846 * auto-clearing). This should happen within 0.5 seconds per the
847 * IEEE spec.
848 */
Stefan Agnera0580522015-12-09 11:21:25 -0800849 reg = phy_read(phydev, devad, MII_BMCR);
Andy Fleming5f184712011-04-08 02:10:27 -0500850 while ((reg & BMCR_RESET) && timeout--) {
851 reg = phy_read(phydev, devad, MII_BMCR);
852
853 if (reg < 0) {
854 debug("PHY status read failed\n");
855 return -1;
856 }
857 udelay(1000);
858 }
859
860 if (reg & BMCR_RESET) {
861 puts("PHY reset timed out\n");
862 return -1;
863 }
864
865 return 0;
866}
867
868int miiphy_reset(const char *devname, unsigned char addr)
869{
870 struct mii_dev *bus = miiphy_get_dev_by_name(devname);
871 struct phy_device *phydev;
872
873 /*
874 * miiphy_reset was only used on standard PHYs, so we'll fake it here.
875 * If later code tries to connect with the right interface, this will
876 * be corrected by get_phy_device in phy_connect()
877 */
878 phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII);
879
880 return phy_reset(phydev);
881}
882
Mario Six8d631202018-01-15 11:08:27 +0100883struct phy_device *phy_find_by_mask(struct mii_dev *bus, uint phy_mask,
884 phy_interface_t interface)
Andy Fleming5f184712011-04-08 02:10:27 -0500885{
Andy Fleming5f184712011-04-08 02:10:27 -0500886 /* Reset the bus */
Jörg Krause59370f32015-07-15 15:18:22 +0200887 if (bus->reset) {
Vladimir Zapolskiye3a77212011-09-05 07:24:07 +0000888 bus->reset(bus);
Andy Fleming5f184712011-04-08 02:10:27 -0500889
Jörg Krause59370f32015-07-15 15:18:22 +0200890 /* Wait 15ms to make sure the PHY has come out of hard reset */
Mario Six8d631202018-01-15 11:08:27 +0100891 mdelay(15);
Jörg Krause59370f32015-07-15 15:18:22 +0200892 }
893
Troy Kisky1adb4062012-10-22 16:40:43 +0000894 return get_phy_device_by_mask(bus, phy_mask, interface);
895}
Andy Fleming5f184712011-04-08 02:10:27 -0500896
Simon Glassc74c8e62015-04-05 16:07:39 -0600897#ifdef CONFIG_DM_ETH
898void phy_connect_dev(struct phy_device *phydev, struct udevice *dev)
899#else
Troy Kisky1adb4062012-10-22 16:40:43 +0000900void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev)
Simon Glassc74c8e62015-04-05 16:07:39 -0600901#endif
Troy Kisky1adb4062012-10-22 16:40:43 +0000902{
Andy Fleming5f184712011-04-08 02:10:27 -0500903 /* Soft Reset the PHY */
904 phy_reset(phydev);
Bin Meng17ecfa92015-10-07 21:19:31 -0700905 if (phydev->dev && phydev->dev != dev) {
Andy Fleming5f184712011-04-08 02:10:27 -0500906 printf("%s:%d is connected to %s. Reconnecting to %s\n",
Mario Six8d631202018-01-15 11:08:27 +0100907 phydev->bus->name, phydev->addr,
908 phydev->dev->name, dev->name);
Troy Kisky1adb4062012-10-22 16:40:43 +0000909 }
Andy Fleming5f184712011-04-08 02:10:27 -0500910 phydev->dev = dev;
Wolfgang Denkb91a9d92011-07-24 21:39:10 +0000911 debug("%s connected to %s\n", dev->name, phydev->drv->name);
Troy Kisky1adb4062012-10-22 16:40:43 +0000912}
Andy Fleming5f184712011-04-08 02:10:27 -0500913
Siva Durga Prasad Paladuguc256d3f2018-11-27 11:49:10 +0530914#ifdef CONFIG_PHY_FIXED
Simon Glassc74c8e62015-04-05 16:07:39 -0600915#ifdef CONFIG_DM_ETH
Siva Durga Prasad Paladuguc256d3f2018-11-27 11:49:10 +0530916static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
917 struct udevice *dev,
918 phy_interface_t interface)
Simon Glassc74c8e62015-04-05 16:07:39 -0600919#else
Siva Durga Prasad Paladuguc256d3f2018-11-27 11:49:10 +0530920static struct phy_device *phy_connect_fixed(struct mii_dev *bus,
921 struct eth_device *dev,
922 phy_interface_t interface)
Simon Glassc74c8e62015-04-05 16:07:39 -0600923#endif
Troy Kisky1adb4062012-10-22 16:40:43 +0000924{
Hannes Schmelzerdb40c1a2017-03-23 15:11:43 +0100925 struct phy_device *phydev = NULL;
Hannes Schmelzerdb40c1a2017-03-23 15:11:43 +0100926 int sn;
927 const char *name;
Mario Six8d631202018-01-15 11:08:27 +0100928
Simon Glassda409cc2017-05-17 17:18:09 -0600929 sn = fdt_first_subnode(gd->fdt_blob, dev_of_offset(dev));
Hannes Schmelzerdb40c1a2017-03-23 15:11:43 +0100930 while (sn > 0) {
931 name = fdt_get_name(gd->fdt_blob, sn, NULL);
Mario Six8d631202018-01-15 11:08:27 +0100932 if (name && strcmp(name, "fixed-link") == 0) {
Pankaj Bansalb3eabd82018-11-16 06:26:18 +0000933 phydev = phy_device_create(bus, sn, PHY_FIXED_ID, false,
934 interface);
Hannes Schmelzerdb40c1a2017-03-23 15:11:43 +0100935 break;
936 }
937 sn = fdt_next_subnode(gd->fdt_blob, sn);
938 }
Siva Durga Prasad Paladuguc256d3f2018-11-27 11:49:10 +0530939
940 return phydev;
941}
Hannes Schmelzerdb40c1a2017-03-23 15:11:43 +0100942#endif
Siva Durga Prasad Paladuguc256d3f2018-11-27 11:49:10 +0530943
944#ifdef CONFIG_DM_ETH
945struct phy_device *phy_connect(struct mii_dev *bus, int addr,
946 struct udevice *dev,
947 phy_interface_t interface)
948#else
949struct phy_device *phy_connect(struct mii_dev *bus, int addr,
950 struct eth_device *dev,
951 phy_interface_t interface)
952#endif
953{
954 struct phy_device *phydev = NULL;
Hannes Schmelzerafbc3192019-03-29 09:54:05 +0100955 uint mask = (addr > 0) ? (1 << addr) : 0xffffffff;
Siva Durga Prasad Paladuguc256d3f2018-11-27 11:49:10 +0530956
957#ifdef CONFIG_PHY_FIXED
958 phydev = phy_connect_fixed(bus, dev, interface);
959#endif
960
Mario Six8d631202018-01-15 11:08:27 +0100961 if (!phydev)
Hannes Schmelzerafbc3192019-03-29 09:54:05 +0100962 phydev = phy_find_by_mask(bus, mask, interface);
Troy Kisky1adb4062012-10-22 16:40:43 +0000963
Troy Kisky1adb4062012-10-22 16:40:43 +0000964 if (phydev)
965 phy_connect_dev(phydev, dev);
966 else
967 printf("Could not get PHY for %s: addr %d\n", bus->name, addr);
Andy Fleming5f184712011-04-08 02:10:27 -0500968 return phydev;
969}
970
Timur Tabi6e5b9ac2012-07-05 10:33:18 +0000971/*
972 * Start the PHY. Returns 0 on success, or a negative error code.
973 */
Andy Fleming5f184712011-04-08 02:10:27 -0500974int phy_startup(struct phy_device *phydev)
975{
976 if (phydev->drv->startup)
Timur Tabi6e5b9ac2012-07-05 10:33:18 +0000977 return phydev->drv->startup(phydev);
Andy Fleming5f184712011-04-08 02:10:27 -0500978
979 return 0;
980}
981
Jeroen Hofstee3c6928f2014-10-08 22:57:26 +0200982__weak int board_phy_config(struct phy_device *phydev)
Andy Fleming5f184712011-04-08 02:10:27 -0500983{
Troy Kisky9fafe7d2012-02-07 14:08:49 +0000984 if (phydev->drv->config)
985 return phydev->drv->config(phydev);
Andy Fleming5f184712011-04-08 02:10:27 -0500986 return 0;
987}
988
Andy Fleming5f184712011-04-08 02:10:27 -0500989int phy_config(struct phy_device *phydev)
990{
Andy Fleming5f184712011-04-08 02:10:27 -0500991 /* Invoke an optional board-specific helper */
Michal Simek7a673f02016-05-18 14:37:23 +0200992 return board_phy_config(phydev);
Andy Fleming5f184712011-04-08 02:10:27 -0500993}
994
995int phy_shutdown(struct phy_device *phydev)
996{
997 if (phydev->drv->shutdown)
998 phydev->drv->shutdown(phydev);
999
1000 return 0;
1001}
Simon Glassc74c8e62015-04-05 16:07:39 -06001002
1003int phy_get_interface_by_name(const char *str)
1004{
1005 int i;
1006
1007 for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) {
1008 if (!strcmp(str, phy_interface_strings[i]))
1009 return i;
1010 }
1011
1012 return -1;
1013}