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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Vikas Manochae66c49f2016-02-11 15:47:20 -08002/*
Patrice Chotard3bc599c2017-10-23 09:53:58 +02003 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
4 * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
Vikas Manochae66c49f2016-02-11 15:47:20 -08005 */
6
7#include <common.h>
Vikas Manocha2d9c33c2017-04-10 15:02:54 -07008#include <dm.h>
Simon Glass52559322019-11-14 12:57:46 -07009#include <init.h>
yannick fertre92eac582018-03-02 15:59:28 +010010#include <lcd.h>
Patrice Chotard77594d72019-02-22 15:04:44 +010011#include <miiphy.h>
12#include <phy_interface.h>
Vikas Manocha2d9c33c2017-04-10 15:02:54 -070013#include <ram.h>
Simon Glassb03e0512019-11-14 12:57:24 -070014#include <serial.h>
Vikas Manochab9747692017-05-28 12:55:10 -070015#include <spl.h>
yannick fertre92eac582018-03-02 15:59:28 +010016#include <splash.h>
17#include <st_logo_data.h>
18#include <video.h>
Vikas Manochae66c49f2016-02-11 15:47:20 -080019#include <asm/io.h>
20#include <asm/armv7m.h>
21#include <asm/arch/stm32.h>
22#include <asm/arch/gpio.h>
Michael Kurzb20b70f2017-01-22 16:04:27 +010023#include <asm/arch/syscfg.h>
Vikas Manocha2f80a9f2017-04-10 15:03:00 -070024#include <asm/gpio.h>
Vikas Manochae66c49f2016-02-11 15:47:20 -080025
26DECLARE_GLOBAL_DATA_PTR;
27
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090028int dram_init(void)
29{
Vikas Manochab9747692017-05-28 12:55:10 -070030#ifndef CONFIG_SUPPORT_SPL
Patrice Chotard8ff21d62018-08-03 13:09:55 +020031 int rv;
Vikas Manochab9747692017-05-28 12:55:10 -070032 struct udevice *dev;
Vikas Manocha2d9c33c2017-04-10 15:02:54 -070033 rv = uclass_get_device(UCLASS_RAM, 0, &dev);
34 if (rv) {
35 debug("DRAM init failed: %d\n", rv);
36 return rv;
37 }
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090038
Vikas Manochab9747692017-05-28 12:55:10 -070039#endif
Patrice Chotard8ff21d62018-08-03 13:09:55 +020040 return fdtdec_setup_mem_size_base();
Vikas Manocha57af3cc2017-04-10 15:03:01 -070041}
42
43int dram_init_banksize(void)
44{
Patrice Chotard8ff21d62018-08-03 13:09:55 +020045 return fdtdec_setup_memory_banksize();
Toshifumi NISHINAGA25c1b132016-07-08 01:02:25 +090046}
47
Vikas Manocha280057b2017-04-10 15:02:59 -070048int board_early_init_f(void)
Michael Kurzd4363ba2017-01-22 16:04:30 +010049{
Michael Kurzd4363ba2017-01-22 16:04:30 +010050 return 0;
51}
Michael Kurzd4363ba2017-01-22 16:04:30 +010052
Vikas Manochab9747692017-05-28 12:55:10 -070053#ifdef CONFIG_SPL_BUILD
Vikas Manocha55a3ef72017-05-28 12:55:13 -070054#ifdef CONFIG_SPL_OS_BOOT
55int spl_start_uboot(void)
56{
57 debug("SPL: booting kernel\n");
58 /* break into full u-boot on 'c' */
59 return serial_tstc() && serial_getc() == 'c';
60}
61#endif
62
Vikas Manochab9747692017-05-28 12:55:10 -070063int spl_dram_init(void)
64{
65 struct udevice *dev;
66 int rv;
67 rv = uclass_get_device(UCLASS_RAM, 0, &dev);
68 if (rv)
69 debug("DRAM init failed: %d\n", rv);
70 return rv;
71}
72void spl_board_init(void)
73{
74 spl_dram_init();
75 preloader_console_init();
76 arch_cpu_init(); /* to configure mpu for sdram rw permissions */
77}
78u32 spl_boot_device(void)
79{
Vikas Manocha1a73bd82017-05-28 12:55:14 -070080 return BOOT_DEVICE_XIP;
Vikas Manochab9747692017-05-28 12:55:10 -070081}
82
83#endif
Vikas Manochae66c49f2016-02-11 15:47:20 -080084u32 get_board_rev(void)
85{
86 return 0;
87}
88
Vikas Manocha2f80a9f2017-04-10 15:03:00 -070089int board_late_init(void)
90{
91 struct gpio_desc gpio = {};
92 int node;
93
94 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,led1");
95 if (node < 0)
96 return -1;
97
Simon Glass150c5af2017-05-30 21:47:09 -060098 gpio_request_by_name_nodev(offset_to_ofnode(node), "led-gpio", 0, &gpio,
Vikas Manocha2f80a9f2017-04-10 15:03:00 -070099 GPIOD_IS_OUT);
100
101 if (dm_gpio_is_valid(&gpio)) {
102 dm_gpio_set_value(&gpio, 0);
103 mdelay(10);
104 dm_gpio_set_value(&gpio, 1);
105 }
106
107 /* read button 1*/
108 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,button1");
109 if (node < 0)
110 return -1;
111
Simon Glass150c5af2017-05-30 21:47:09 -0600112 gpio_request_by_name_nodev(offset_to_ofnode(node), "button-gpio", 0,
113 &gpio, GPIOD_IS_IN);
Vikas Manocha2f80a9f2017-04-10 15:03:00 -0700114
115 if (dm_gpio_is_valid(&gpio)) {
116 if (dm_gpio_get_value(&gpio))
117 puts("usr button is at HIGH LEVEL\n");
118 else
119 puts("usr button is at LOW LEVEL\n");
120 }
121
122 return 0;
123}
124
Vikas Manochae66c49f2016-02-11 15:47:20 -0800125int board_init(void)
126{
Vikas Manocha57af3cc2017-04-10 15:03:01 -0700127 gd->bd->bi_boot_params = gd->bd->bi_dram[0].start + 0x100;
Patrice Chotard20fe38e2018-01-18 14:10:05 +0100128
129#ifdef CONFIG_ETH_DESIGNWARE
Patrice Chotard77594d72019-02-22 15:04:44 +0100130 const char *phy_mode;
131 int node;
132
133 node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,stm32-dwmac");
134 if (node < 0)
135 return -1;
136
137 phy_mode = fdt_getprop(gd->fdt_blob, node, "phy-mode", NULL);
138
139 switch (phy_get_interface_by_name(phy_mode)) {
140 case PHY_INTERFACE_MODE_RMII:
141 STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
142 break;
143 case PHY_INTERFACE_MODE_MII:
144 STM32_SYSCFG->pmc &= ~SYSCFG_PMC_MII_RMII_SEL;
145 break;
146 default:
147 printf("PHY interface %s not supported !\n", phy_mode);
148 }
Patrice Chotard20fe38e2018-01-18 14:10:05 +0100149#endif
150
yannick fertre92eac582018-03-02 15:59:28 +0100151#if defined(CONFIG_CMD_BMP)
152 bmp_display((ulong)stmicroelectronics_uboot_logo_8bit_rle,
153 BMP_ALIGN_CENTER, BMP_ALIGN_CENTER);
154#endif /* CONFIG_CMD_BMP */
155
Vikas Manochae66c49f2016-02-11 15:47:20 -0800156 return 0;
157}