blob: bcae6ff67ca41e674d37fae7da90ca9abf6110c0 [file] [log] [blame]
Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Marek Vasutbd390502017-07-21 23:15:21 +02002/*
3 * board/renesas/ulcb/ulcb.c
4 * This file is ULCB board support.
5 *
6 * Copyright (C) 2017 Renesas Electronics Corporation
Marek Vasutbd390502017-07-21 23:15:21 +02007 */
8
9#include <common.h>
10#include <malloc.h>
11#include <netdev.h>
12#include <dm.h>
13#include <dm/platform_data/serial_sh.h>
14#include <asm/processor.h>
15#include <asm/mach-types.h>
16#include <asm/io.h>
17#include <linux/errno.h>
18#include <asm/arch/sys_proto.h>
19#include <asm/gpio.h>
20#include <asm/arch/gpio.h>
21#include <asm/arch/rmobile.h>
22#include <asm/arch/rcar-mstp.h>
23#include <asm/arch/sh_sdhi.h>
24#include <i2c.h>
25#include <mmc.h>
26
27DECLARE_GLOBAL_DATA_PTR;
28
Marek Vasutbd390502017-07-21 23:15:21 +020029void s_init(void)
30{
Marek Vasutbd390502017-07-21 23:15:21 +020031}
32
Marek Vasutbd390502017-07-21 23:15:21 +020033#define DVFS_MSTP926 BIT(26)
Marek Vasutef603232017-09-12 19:07:22 +020034#define HSUSB_MSTP704 BIT(4) /* HSUSB */
Marek Vasutbd390502017-07-21 23:15:21 +020035
Marek Vasutbd390502017-07-21 23:15:21 +020036int board_early_init_f(void)
37{
Marek Vasutbd390502017-07-21 23:15:21 +020038#if defined(CONFIG_SYS_I2C) && defined(CONFIG_SYS_I2C_SH)
39 /* DVFS for reset */
Hiroyuki Yokoyamacf97b222018-09-26 16:00:09 +090040 mstp_clrbits_le32(SMSTPCR9, SMSTPCR9, DVFS_MSTP926);
Marek Vasutbd390502017-07-21 23:15:21 +020041#endif
42 return 0;
43}
44
Marek Vasutef603232017-09-12 19:07:22 +020045/* HSUSB block registers */
46#define HSUSB_REG_LPSTS 0xE6590102
47#define HSUSB_REG_LPSTS_SUSPM_NORMAL BIT(14)
48#define HSUSB_REG_UGCTRL2 0xE6590184
49#define HSUSB_REG_UGCTRL2_USB0SEL 0x30
50#define HSUSB_REG_UGCTRL2_USB0SEL_EHCI 0x10
51
Marek Vasutbd390502017-07-21 23:15:21 +020052int board_init(void)
53{
54 /* adress of boot parameters */
55 gd->bd->bi_boot_params = CONFIG_SYS_TEXT_BASE + 0x50000;
56
Marek Vasutbd390502017-07-21 23:15:21 +020057 /* USB1 pull-up */
58 setbits_le32(PFC_PUEN6, PUEN_USB1_OVC | PUEN_USB1_PWEN);
59
Marek Vasutef603232017-09-12 19:07:22 +020060 /* Configure the HSUSB block */
Hiroyuki Yokoyamacf97b222018-09-26 16:00:09 +090061 mstp_clrbits_le32(SMSTPCR7, SMSTPCR7, HSUSB_MSTP704);
Marek Vasutef603232017-09-12 19:07:22 +020062 /* Choice USB0SEL */
63 clrsetbits_le32(HSUSB_REG_UGCTRL2, HSUSB_REG_UGCTRL2_USB0SEL,
64 HSUSB_REG_UGCTRL2_USB0SEL_EHCI);
65 /* low power status */
66 setbits_le16(HSUSB_REG_LPSTS, HSUSB_REG_LPSTS_SUSPM_NORMAL);
67
Marek Vasut6f380852017-08-20 17:13:48 +020068 return 0;
Marek Vasutbd390502017-07-21 23:15:21 +020069}
Marek Vasutbd390502017-07-21 23:15:21 +020070
Marek Vasut04513802018-12-04 01:44:34 +010071#ifdef CONFIG_MULTI_DTB_FIT
72int board_fit_config_name_match(const char *name)
73{
74 /* PRR driver is not available yet */
75 u32 cpu_type = rmobile_get_cpu_type();
76
77 if ((cpu_type == RMOBILE_CPU_TYPE_R8A7795) &&
78 !strcmp(name, "r8a7795-h3ulcb-u-boot"))
79 return 0;
80
81 if ((cpu_type == RMOBILE_CPU_TYPE_R8A7796) &&
82 !strcmp(name, "r8a7796-m3ulcb-u-boot"))
83 return 0;
84
Marek Vasutc4ea43d2019-03-04 12:34:50 +010085 if ((cpu_type == RMOBILE_CPU_TYPE_R8A77965) &&
86 !strcmp(name, "r8a77965-m3nulcb-u-boot"))
87 return 0;
88
Marek Vasut04513802018-12-04 01:44:34 +010089 return -1;
90}
91#endif