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Andrej Rosano3bf801a2015-04-08 18:56:30 +02001/*
2 * USB armory MkI board configuration settings
3 * http://inversepath.com/usbarmory
4 *
5 * Copyright (C) 2015, Inverse Path
6 * Andrej Rosano <andrej@inversepath.com>
7 *
8 * SPDX-License-Identifier:|____GPL-2.0+
9 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
Gong Qianyu18fb0e32015-10-26 19:47:42 +080014#define CONFIG_SYS_FSL_CLK
Andrej Rosano3bf801a2015-04-08 18:56:30 +020015#define CONFIG_MXC_GPIO
16
17#include <asm/arch/imx-regs.h>
Andrej Rosano3bf801a2015-04-08 18:56:30 +020018
19#include <config_distro_defaults.h>
20
Andrej Rosano3bf801a2015-04-08 18:56:30 +020021/* U-Boot environment */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020022#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
23#define CONFIG_ENV_SIZE (8 * 1024)
Andrej Rosano3bf801a2015-04-08 18:56:30 +020024#define CONFIG_SYS_MMC_ENV_DEV 0
25
26/* U-Boot general configurations */
27#define CONFIG_SYS_CBSIZE 512
Andrej Rosano3bf801a2015-04-08 18:56:30 +020028
29/* UART */
30#define CONFIG_MXC_UART
31#define CONFIG_MXC_UART_BASE UART1_BASE
32#define CONFIG_CONS_INDEX 1
Andrej Rosano3bf801a2015-04-08 18:56:30 +020033
34/* SD/MMC */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020035#define CONFIG_FSL_ESDHC
36#define CONFIG_SYS_FSL_ESDHC_ADDR 0
37#define CONFIG_SYS_FSL_ESDHC_NUM 1
Andrej Rosano3bf801a2015-04-08 18:56:30 +020038
39/* USB */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020040#define CONFIG_USB_EHCI_MX5
Andrej Rosano3bf801a2015-04-08 18:56:30 +020041#define CONFIG_MXC_USB_PORT 1
42#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
43#define CONFIG_MXC_USB_FLAGS 0
44
45/* I2C */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020046#define CONFIG_SYS_I2C
47#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +020048#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
49#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020050
51/* Fuse */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020052#define CONFIG_FSL_IIM
53
Andrej Rosano9a45ec32016-06-20 17:21:48 +020054/* U-Boot memory offsets */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020055#define CONFIG_LOADADDR 0x72000000
56#define CONFIG_SYS_TEXT_BASE 0x77800000
57#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
Andrej Rosano9a45ec32016-06-20 17:21:48 +020058
59/* Linux boot */
Andrej Rosano3bf801a2015-04-08 18:56:30 +020060#define CONFIG_HOSTNAME usbarmory
61#define CONFIG_BOOTCOMMAND \
62 "run distro_bootcmd; " \
63 "setenv bootargs console=${console} ${bootargs_default}; " \
Andrej Rosano9a45ec32016-06-20 17:21:48 +020064 "ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; " \
Andrej Rosano3bf801a2015-04-08 18:56:30 +020065 "ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; " \
Andrej Rosano9a45ec32016-06-20 17:21:48 +020066 "bootz ${kernel_addr_r} - ${fdt_addr_r}"
Andrej Rosano3bf801a2015-04-08 18:56:30 +020067
68#define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0)
69
70#include <config_distro_bootcmd.h>
71
72#define MEM_LAYOUT_ENV_SETTINGS \
73 "kernel_addr_r=0x70800000\0" \
74 "fdt_addr_r=0x71000000\0" \
75 "scriptaddr=0x70800000\0" \
76 "pxefile_addr_r=0x70800000\0" \
77 "ramdisk_addr_r=0x73000000\0"
78
79#define CONFIG_EXTRA_ENV_SETTINGS \
80 MEM_LAYOUT_ENV_SETTINGS \
81 "bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0" \
82 "fdtfile=imx53-usbarmory.dtb\0" \
83 "console=ttymxc0,115200\0" \
84 BOOTENV
85
Andrej Rosanoa02ab5e2016-06-20 17:21:49 +020086#ifndef CONFIG_CMDLINE
Andrej Rosanoa02ab5e2016-06-20 17:21:49 +020087#define USBARMORY_FIT_PATH "/boot/usbarmory.itb"
88#define USBARMORY_FIT_ADDR "0x70800000"
89#endif
90
Andrej Rosano3bf801a2015-04-08 18:56:30 +020091/* Physical Memory Map */
92#define CONFIG_NR_DRAM_BANKS 1
93#define PHYS_SDRAM CSD0_BASE_ADDR
94#define PHYS_SDRAM_SIZE (gd->ram_size)
95
96#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
97#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
98#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
99
100#define CONFIG_SYS_INIT_SP_OFFSET \
101 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
102#define CONFIG_SYS_INIT_SP_ADDR \
103 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
104
105#define CONFIG_SYS_MEMTEST_START 0x70000000
106#define CONFIG_SYS_MEMTEST_END 0x90000000
107
108#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
109
110#endif /* __CONFIG_H */