| Michael Walle | 4ceb5c6 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 1 | if TARGET_SL28 |
| 2 | |
| 3 | config SYS_BOARD |
| 4 | default "sl28" |
| 5 | |
| 6 | config SYS_VENDOR |
| 7 | default "kontron" |
| 8 | |
| 9 | config SYS_SOC |
| 10 | default "fsl-layerscape" |
| 11 | |
| 12 | config SYS_CONFIG_NAME |
| 13 | default "kontron_sl28" |
| 14 | |
| Simon Glass | 9846390 | 2022-10-20 18:22:39 -0600 | [diff] [blame] | 15 | config TEXT_BASE |
| Michael Walle | 4ceb5c6 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 16 | default 0x96000000 |
| 17 | |
| Michael Walle | e057760 | 2020-11-18 17:46:01 +0100 | [diff] [blame] | 18 | config SL28_SPL_LOADS_ATF_BL31 |
| 19 | bool "SPL loads BL31 of the ARM Trusted Firmware" |
| 20 | select SPL_ATF |
| 21 | select SPL_ATF_LOAD_IMAGE_V2 |
| 22 | select ARMV8_SEC_FIRMWARE_SUPPORT |
| 23 | select SEC_FIRMWARE_ARMV8_PSCI |
| 24 | help |
| 25 | Enable this to load a BL31 image by the SPL. You have to |
| 26 | provde a bl31.bin in u-boot's root directory. |
| 27 | |
| Michael Walle | 4c450da | 2020-11-18 17:46:02 +0100 | [diff] [blame] | 28 | if SL28_SPL_LOADS_ATF_BL31 |
| 29 | |
| 30 | config SL28_BL31_ENTRY_ADDR |
| 31 | hex "Entry point of the BL31 image" |
| 32 | default 0xfbe00000 |
| 33 | |
| 34 | endif |
| 35 | |
| 36 | config SL28_SPL_LOADS_OPTEE_BL32 |
| 37 | bool "SPL loads OP-TEE Trusted OS as BL32" |
| 38 | depends on SL28_SPL_LOADS_ATF_BL31 |
| 39 | help |
| 40 | Enable this to load a BL32 image by the SPL. You have to |
| 41 | provde a tee.bin in u-boot's root directory. |
| 42 | |
| 43 | if SL28_SPL_LOADS_OPTEE_BL32 |
| 44 | |
| 45 | config SL28_BL32_ENTRY_ADDR |
| 46 | hex "Entry point of the BL32 image" |
| 47 | default 0xfc000000 |
| 48 | |
| 49 | endif |
| 50 | |
| Michael Walle | 9b3843f | 2021-03-26 19:40:59 +0100 | [diff] [blame] | 51 | config SL28_ENABLE_SER0_CONSOLE |
| 52 | bool "Enable console output on SER0" |
| 53 | select DM_SERIAL |
| 54 | select SPL_DM_SERIAL |
| 55 | select FSL_LPUART |
| 56 | help |
| 57 | By default the console output of this board is on the second serial |
| 58 | line (SER1). Sometimes it is desirable to enable output on the first |
| 59 | serial line (SER0). For example, if you have a carrier which only |
| 60 | supports the first serial port. |
| Michael Walle | 4ceb5c6 | 2020-10-15 23:08:57 +0200 | [diff] [blame] | 61 | endif |