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Mike Frysingerd9a5d112008-10-12 20:59:12 -04001/*
2 * U-boot - Configuration file for BF537 STAMP board
3 */
4
5#ifndef __CONFIG_BF527_EZKIT_H__
6#define __CONFIG_BF527_EZKIT_H__
7
Mike Frysingerf348ab82009-04-24 17:22:40 -04008#include <asm/config-pre.h>
Mike Frysingerd9a5d112008-10-12 20:59:12 -04009
10
11/*
12 * Processor Settings
13 */
Mike Frysingerd9a5d112008-10-12 20:59:12 -040014#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
15
16
17/*
18 * Clock Settings
19 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
20 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
21 */
22/* CONFIG_CLKIN_HZ is any value in Hz */
23#define CONFIG_CLKIN_HZ 25000000
24/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
25/* 1 = CLKIN / 2 */
26#define CONFIG_CLKIN_HALF 0
27/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
28/* 1 = bypass PLL */
29#define CONFIG_PLL_BYPASS 0
30/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
31/* Values can range from 0-63 (where 0 means 64) */
32#define CONFIG_VCO_MULT 21
33/* CCLK_DIV controls the core clock divider */
34/* Values can be 1, 2, 4, or 8 ONLY */
35#define CONFIG_CCLK_DIV 1
36/* SCLK_DIV controls the system clock divider */
37/* Values can range from 1-15 */
38#define CONFIG_SCLK_DIV 4
39
40
41/*
42 * Memory Settings
43 */
44#define CONFIG_MEM_ADD_WDTH 10
45#define CONFIG_MEM_SIZE 64
46
47#define CONFIG_EBIU_SDRRC_VAL 0x03F6
48#define CONFIG_EBIU_SDGCTL_VAL (SCTLE | CL_3 | PASR_ALL | TRAS_6 | TRP_3 | TRCD_3 | TWR_2 | PSS)
49
50#define CONFIG_EBIU_AMGCTL_VAL (AMCKEN | AMBEN_ALL)
51#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_15 | B1RAT_15 | B1HT_3 | B1RDYPOL | B0WAT_15 | B0RAT_15 | B0HT_3 | B0RDYPOL)
52#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_15 | B3RAT_15 | B3HT_3 | B3RDYPOL | B2WAT_15 | B2RAT_15 | B2HT_3 | B2RDYPOL)
53
54#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
55#define CONFIG_SYS_MALLOC_LEN (640 * 1024)
56
57
58/*
59 * NAND Settings
60 * (can't be used same time as ethernet)
61 */
62#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND)
Mike Frysingerb7659ef2009-11-11 17:29:35 -050063# define CONFIG_BFIN_NFC
64# define CONFIG_BFIN_NFC_BOOTROM_ECC
Mike Frysingerd9a5d112008-10-12 20:59:12 -040065#endif
66#ifdef CONFIG_BFIN_NFC
67#define CONFIG_BFIN_NFC_CTL_VAL 0x0033
68#define CONFIG_DRIVER_NAND_BFIN
69#define CONFIG_SYS_NAND_BASE 0 /* not actually used */
70#define CONFIG_SYS_MAX_NAND_DEVICE 1
71#define NAND_MAX_CHIPS 1
Mike Frysingerd9a5d112008-10-12 20:59:12 -040072#endif
73
74
75/*
76 * Network Settings
77 */
78#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) && \
79 !defined(__ADSPBF524__) && !defined(__ADSPBF525__) && !defined(CONFIG_BFIN_NFC)
80#define ADI_CMDS_NETWORK 1
81#define CONFIG_BFIN_MAC
82#define CONFIG_RMII
83#define CONFIG_NETCONSOLE 1
84#define CONFIG_NET_MULTI 1
85#endif
86#define CONFIG_HOSTNAME bf527-ezkit
87/* Uncomment next line to use fixed MAC address */
88/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
89
90
91/*
92 * Flash Settings
93 */
94#define CONFIG_FLASH_CFI_DRIVER
95#define CONFIG_SYS_FLASH_BASE 0x20000000
96#define CONFIG_SYS_FLASH_CFI
97#define CONFIG_SYS_FLASH_PROTECTION
98#define CONFIG_SYS_MAX_FLASH_BANKS 1
99#define CONFIG_SYS_MAX_FLASH_SECT 259
100
101
102/*
103 * SPI Settings
104 */
105#define CONFIG_BFIN_SPI
106#define CONFIG_ENV_SPI_MAX_HZ 30000000
Mike Frysingerafac8b02009-06-14 22:29:35 -0400107#define CONFIG_SF_DEFAULT_SPEED 30000000
Mike Frysingerd9a5d112008-10-12 20:59:12 -0400108#define CONFIG_SPI_FLASH
109#define CONFIG_SPI_FLASH_STMICRO
110
111
112/*
113 * Env Storage Settings
114 */
115#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
116#define CONFIG_ENV_IS_IN_SPI_FLASH
Mike Frysinger53310b82009-05-05 01:35:41 -0400117#define CONFIG_ENV_OFFSET 0x10000
Mike Frysingerd9a5d112008-10-12 20:59:12 -0400118#define CONFIG_ENV_SIZE 0x2000
Mike Frysinger53310b82009-05-05 01:35:41 -0400119#define CONFIG_ENV_SECT_SIZE 0x10000
Mike Frysingerb7659ef2009-11-11 17:29:35 -0500120#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
121#elif (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND)
122#define CONFIG_ENV_IS_IN_NAND
123#define CONFIG_ENV_OFFSET 0x40000
124#define CONFIG_ENV_SIZE 0x20000
Mike Frysingerd9a5d112008-10-12 20:59:12 -0400125#else
126#define CONFIG_ENV_IS_IN_FLASH
127#define CONFIG_ENV_OFFSET 0x4000
128#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
129#define CONFIG_ENV_SIZE 0x2000
130#define CONFIG_ENV_SECT_SIZE 0x2000
Mike Frysinger76d82182009-07-21 22:17:36 -0400131#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
Mike Frysingerb7659ef2009-11-11 17:29:35 -0500132#endif
Mike Frysingerd9a5d112008-10-12 20:59:12 -0400133
134
135/*
136 * I2C Settings
137 */
138#define CONFIG_BFIN_TWI_I2C 1
139#define CONFIG_HARD_I2C 1
Mike Frysingerd9a5d112008-10-12 20:59:12 -0400140
141
142/*
143 * USB Settings
144 */
145#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__)
146#define CONFIG_USB
147#define CONFIG_MUSB_HCD
148#define CONFIG_USB_BLACKFIN
149#define CONFIG_USB_STORAGE
150#define CONFIG_MUSB_TIMEOUT 100000
151#endif
152
153
154/*
Michael Hennerich10eafa12009-12-10 09:19:21 +0000155 * Video Settings
156 */
Wolfgang Denkd24f2d32010-10-04 19:58:00 +0200157#ifdef CONFIG_BF527_EZKIT_REV_2_1
Michael Hennerich10eafa12009-12-10 09:19:21 +0000158# define CONFIG_LQ035Q1_SPI_BUS 0
159# define CONFIG_LQ035Q1_SPI_CS 7
160#endif
161
162
163/*
Mike Frysingerd9a5d112008-10-12 20:59:12 -0400164 * Misc Settings
165 */
166#define CONFIG_MISC_INIT_R
167#define CONFIG_RTC_BFIN
168#define CONFIG_UART_CONSOLE 1
169
170/* Don't waste time transferring a logo over the UART */
171#if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART)
172# define CONFIG_VIDEO
173#endif
174
175
176/*
177 * Pull in common ADI header for remaining command/environment setup
178 */
179#include <configs/bfin_adi_common.h>
180
Mike Frysingerd9a5d112008-10-12 20:59:12 -0400181#endif