blob: 85042c5254b3fca805ba199f55ae9d5bfee4b7c5 [file] [log] [blame]
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -05001/*
2 * Copyright 2007-2009 Freescale Semiconductor, Inc.
3 *
4 * See file CREDITS for list of people who contributed to this
5 * project.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20 * MA 02111-1307 USA
21 */
22
Kumar Gala6c97a202009-09-09 11:40:41 -050023#ifndef RESET_VECTOR_ADDRESS
24#define RESET_VECTOR_ADDRESS 0xfffffffc
25#endif
26
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050027OUTPUT_ARCH(powerpc)
Peter Tyserfbe53f52010-09-29 14:05:56 -050028
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050029PHDRS
30{
31 text PT_LOAD;
32 bss PT_LOAD;
33}
34
35SECTIONS
36{
37 /* Read-only sections, merged into text segment: */
38 . = + SIZEOF_HEADERS;
39 .interp : { *(.interp) }
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050040 .text :
41 {
Peter Tyserfbe53f52010-09-29 14:05:56 -050042 *(.text*)
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050043 } :text
44 _etext = .;
45 PROVIDE (etext = .);
46 .rodata :
47 {
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050048 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
49 } :text
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050050
51 /* Read-write section, merged into data segment: */
52 . = (. + 0x00FF) & 0xFFFFFF00;
53 _erotext = .;
54 PROVIDE (erotext = .);
55 .reloc :
56 {
Peter Tyserfbe53f52010-09-29 14:05:56 -050057 KEEP(*(.got))
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050058 _GOT2_TABLE_ = .;
Peter Tyserfbe53f52010-09-29 14:05:56 -050059 KEEP(*(.got2))
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050060 _FIXUP_TABLE_ = .;
Peter Tyserfbe53f52010-09-29 14:05:56 -050061 KEEP(*(.fixup))
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050062 }
63 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
64 __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
65
66 .data :
67 {
Peter Tyserfbe53f52010-09-29 14:05:56 -050068 *(.data*)
69 *(.sdata*)
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050070 }
71 _edata = .;
72 PROVIDE (edata = .);
73
74 . = .;
75 __u_boot_cmd_start = .;
76 .u_boot_cmd : { *(.u_boot_cmd) }
77 __u_boot_cmd_end = .;
78
79 . = .;
80 __start___ex_table = .;
81 __ex_table : { *(__ex_table) }
82 __stop___ex_table = .;
83
84 . = ALIGN(256);
85 __init_begin = .;
86 .text.init : { *(.text.init) }
87 .data.init : { *(.data.init) }
88 . = ALIGN(256);
89 __init_end = .;
90
Kumar Gala6c97a202009-09-09 11:40:41 -050091 .bootpg RESET_VECTOR_ADDRESS - 0xffc :
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050092 {
Stefan Roesea47a12b2010-04-15 16:07:28 +020093 arch/powerpc/cpu/mpc85xx/start.o (.bootpg)
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050094 } :text = 0xffff
95
Kumar Gala6c97a202009-09-09 11:40:41 -050096 .resetvec RESET_VECTOR_ADDRESS :
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050097 {
Peter Tyserfbe53f52010-09-29 14:05:56 -050098 KEEP(*(.resetvec))
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -050099 } :text = 0xffff
100
Kumar Gala6c97a202009-09-09 11:40:41 -0500101 . = RESET_VECTOR_ADDRESS + 0x4;
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -0500102
Peter Tyser3beb40c2009-10-07 11:45:00 -0500103 /*
104 * Make sure that the bss segment isn't linked at 0x0, otherwise its
105 * address won't be updated during relocation fixups. Note that
106 * this is a temporary fix. Code to dynamically the fixup the bss
107 * location will be added in the future. When the bss relocation
108 * fixup code is present this workaround should be removed.
109 */
110#if (RESET_VECTOR_ADDRESS == 0xfffffffc)
111 . |= 0x10;
112#endif
113
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -0500114 __bss_start = .;
115 .bss (NOLOAD) :
116 {
Peter Tyserfbe53f52010-09-29 14:05:56 -0500117 *(.sbss*)
118 *(.bss*)
Srikanth Srinivasanfeb78382009-04-03 15:36:13 -0500119 *(COMMON)
120 } :bss
121
122 . = ALIGN(4);
123 _end = . ;
124 PROVIDE (end = .);
125}