Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2009 |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 4 | * Graeme Russ, <graeme.russ@gmail.com> |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 5 | * |
| 6 | * (C) Copyright 2007 |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 7 | * Daniel Hellstrom, Gaisler Research, <daniel@gaisler.com> |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 8 | * |
| 9 | * (C) Copyright 2006 |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 10 | * Detlev Zundel, DENX Software Engineering, <dzu@denx.de> |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 11 | * |
| 12 | * (C) Copyright -2003 |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 13 | * Wolfgang Denk, DENX Software Engineering, <wd@denx.de> |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 14 | * |
| 15 | * (C) Copyright 2002 |
Albert ARIBAUD | fa82f87 | 2011-08-04 18:45:45 +0200 | [diff] [blame] | 16 | * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se> |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 17 | * |
| 18 | * (C) Copyright 2001 |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 19 | * Josh Huber, Mission Critical Linux, Inc, <huber@mclx.com> |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 20 | */ |
| 21 | |
| 22 | /* |
| 23 | * This file contains the high-level API for the interrupt sub-system |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 24 | * of the x86 port of U-Boot. Most of the functionality has been |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 25 | * shamelessly stolen from the leon2 / leon3 ports of U-Boot. |
| 26 | * Daniel Hellstrom, Detlev Zundel, Wolfgang Denk and Josh Huber are |
| 27 | * credited for the corresponding work on those ports. The original |
Graeme Russ | dbf7115 | 2011-04-13 19:43:26 +1000 | [diff] [blame] | 28 | * interrupt handling routines for the x86 port were written by |
Albert ARIBAUD | fa82f87 | 2011-08-04 18:45:45 +0200 | [diff] [blame] | 29 | * Daniel Engström |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 30 | */ |
| 31 | |
| 32 | #include <common.h> |
Simon Glass | f7ae49f | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 33 | #include <command.h> |
Simon Glass | c30b7ad | 2019-11-14 12:57:41 -0700 | [diff] [blame] | 34 | #include <irq_func.h> |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 35 | #include <asm/interrupt.h> |
| 36 | |
Simon Glass | c2bf0df | 2017-01-16 07:04:14 -0700 | [diff] [blame] | 37 | #if !CONFIG_IS_ENABLED(X86_64) |
| 38 | |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 39 | struct irq_action { |
| 40 | interrupt_handler_t *handler; |
| 41 | void *arg; |
| 42 | unsigned int count; |
| 43 | }; |
| 44 | |
Bin Meng | 6c50527 | 2015-10-22 19:13:26 -0700 | [diff] [blame] | 45 | static struct irq_action irq_handlers[SYS_NUM_IRQS] = { {0} }; |
Graeme Russ | 83088af | 2011-11-08 02:33:15 +0000 | [diff] [blame] | 46 | static int spurious_irq_cnt; |
| 47 | static int spurious_irq; |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 48 | |
| 49 | void irq_install_handler(int irq, interrupt_handler_t *handler, void *arg) |
| 50 | { |
| 51 | int status; |
| 52 | |
Bin Meng | 6c50527 | 2015-10-22 19:13:26 -0700 | [diff] [blame] | 53 | if (irq < 0 || irq >= SYS_NUM_IRQS) { |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 54 | printf("irq_install_handler: bad irq number %d\n", irq); |
| 55 | return; |
| 56 | } |
| 57 | |
| 58 | if (irq_handlers[irq].handler != NULL) |
| 59 | printf("irq_install_handler: 0x%08lx replacing 0x%08lx\n", |
Graeme Russ | 83088af | 2011-11-08 02:33:15 +0000 | [diff] [blame] | 60 | (ulong) handler, |
| 61 | (ulong) irq_handlers[irq].handler); |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 62 | |
Graeme Russ | 83088af | 2011-11-08 02:33:15 +0000 | [diff] [blame] | 63 | status = disable_interrupts(); |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 64 | |
Graeme Russ | 1c409bc | 2009-11-24 20:04:21 +1100 | [diff] [blame] | 65 | irq_handlers[irq].handler = handler; |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 66 | irq_handlers[irq].arg = arg; |
| 67 | irq_handlers[irq].count = 0; |
| 68 | |
Bin Meng | c641010 | 2018-11-29 19:57:21 -0800 | [diff] [blame] | 69 | if (CONFIG_IS_ENABLED(I8259_PIC)) |
| 70 | unmask_irq(irq); |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 71 | |
| 72 | if (status) |
| 73 | enable_interrupts(); |
| 74 | |
| 75 | return; |
| 76 | } |
| 77 | |
| 78 | void irq_free_handler(int irq) |
| 79 | { |
| 80 | int status; |
| 81 | |
Bin Meng | 6c50527 | 2015-10-22 19:13:26 -0700 | [diff] [blame] | 82 | if (irq < 0 || irq >= SYS_NUM_IRQS) { |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 83 | printf("irq_free_handler: bad irq number %d\n", irq); |
| 84 | return; |
| 85 | } |
| 86 | |
Graeme Russ | 83088af | 2011-11-08 02:33:15 +0000 | [diff] [blame] | 87 | status = disable_interrupts(); |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 88 | |
Bin Meng | c641010 | 2018-11-29 19:57:21 -0800 | [diff] [blame] | 89 | if (CONFIG_IS_ENABLED(I8259_PIC)) |
| 90 | mask_irq(irq); |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 91 | |
| 92 | irq_handlers[irq].handler = NULL; |
| 93 | irq_handlers[irq].arg = NULL; |
| 94 | |
| 95 | if (status) |
| 96 | enable_interrupts(); |
| 97 | |
| 98 | return; |
| 99 | } |
| 100 | |
Graeme Russ | 564a998 | 2009-11-24 20:04:18 +1100 | [diff] [blame] | 101 | void do_irq(int hw_irq) |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 102 | { |
Graeme Russ | 564a998 | 2009-11-24 20:04:18 +1100 | [diff] [blame] | 103 | int irq = hw_irq - 0x20; |
| 104 | |
Bin Meng | 6c50527 | 2015-10-22 19:13:26 -0700 | [diff] [blame] | 105 | if (irq < 0 || irq >= SYS_NUM_IRQS) { |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 106 | printf("do_irq: bad irq number %d\n", irq); |
| 107 | return; |
| 108 | } |
| 109 | |
| 110 | if (irq_handlers[irq].handler) { |
Bin Meng | c641010 | 2018-11-29 19:57:21 -0800 | [diff] [blame] | 111 | if (CONFIG_IS_ENABLED(I8259_PIC)) |
| 112 | mask_irq(irq); |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 113 | |
| 114 | irq_handlers[irq].handler(irq_handlers[irq].arg); |
| 115 | irq_handlers[irq].count++; |
| 116 | |
Bin Meng | c641010 | 2018-11-29 19:57:21 -0800 | [diff] [blame] | 117 | if (CONFIG_IS_ENABLED(I8259_PIC)) { |
| 118 | unmask_irq(irq); |
| 119 | specific_eoi(irq); |
| 120 | } |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 121 | } else { |
| 122 | if ((irq & 7) != 7) { |
| 123 | spurious_irq_cnt++; |
| 124 | spurious_irq = irq; |
| 125 | } |
| 126 | } |
| 127 | } |
Simon Glass | c2bf0df | 2017-01-16 07:04:14 -0700 | [diff] [blame] | 128 | #endif |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 129 | |
| 130 | #if defined(CONFIG_CMD_IRQ) |
Simon Glass | 0914011 | 2020-05-10 11:40:03 -0600 | [diff] [blame] | 131 | int do_irqinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 132 | { |
Simon Glass | c2bf0df | 2017-01-16 07:04:14 -0700 | [diff] [blame] | 133 | #if !CONFIG_IS_ENABLED(X86_64) |
Simon Glass | a0ed800 | 2020-11-04 09:57:28 -0700 | [diff] [blame] | 134 | struct idt_ptr ptr; |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 135 | int irq; |
| 136 | |
Simon Glass | a0ed800 | 2020-11-04 09:57:28 -0700 | [diff] [blame] | 137 | interrupt_read_idt(&ptr); |
| 138 | printf("IDT at %lx, size %x\n", ptr.address, ptr.size); |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 139 | printf("Spurious IRQ: %u, last unknown IRQ: %d\n", |
Graeme Russ | 83088af | 2011-11-08 02:33:15 +0000 | [diff] [blame] | 140 | spurious_irq_cnt, spurious_irq); |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 141 | |
Graeme Russ | 83088af | 2011-11-08 02:33:15 +0000 | [diff] [blame] | 142 | printf("Interrupt-Information:\n"); |
| 143 | printf("Nr Routine Arg Count\n"); |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 144 | |
Bin Meng | 6c50527 | 2015-10-22 19:13:26 -0700 | [diff] [blame] | 145 | for (irq = 0; irq < SYS_NUM_IRQS; irq++) { |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 146 | if (irq_handlers[irq].handler != NULL) { |
Graeme Russ | 83088af | 2011-11-08 02:33:15 +0000 | [diff] [blame] | 147 | printf("%02d %08lx %08lx %d\n", |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 148 | irq, |
| 149 | (ulong)irq_handlers[irq].handler, |
| 150 | (ulong)irq_handlers[irq].arg, |
| 151 | irq_handlers[irq].count); |
| 152 | } |
| 153 | } |
Simon Glass | c2bf0df | 2017-01-16 07:04:14 -0700 | [diff] [blame] | 154 | #endif |
Graeme Russ | abf0cd3 | 2009-02-24 21:13:40 +1100 | [diff] [blame] | 155 | |
| 156 | return 0; |
| 157 | } |
| 158 | #endif |