blob: 620e7bbace2d867727ce3e468503365b798c3807 [file] [log] [blame]
Sergey Kubushync74b2102007-08-10 20:26:18 +02001/*
2 * Intel LXT971/LXT972 PHY Driver for TI DaVinci
3 * (TMS320DM644x) based boards.
4 *
5 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
6 *
7 * --------------------------------------------------------
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <common.h>
29#include <net.h>
Hugo Villeneuvefec61432008-06-18 12:10:31 -040030#include <miiphy.h>
Sergey Kubushync74b2102007-08-10 20:26:18 +020031#include <lxt971a.h>
32#include <asm/arch/emac_defs.h>
33
34#ifdef CONFIG_DRIVER_TI_EMAC
35
36#ifdef CONFIG_CMD_NET
37
38int lxt972_is_phy_connected(int phy_addr)
39{
40 u_int16_t id1, id2;
41
Hugo Villeneuvefec61432008-06-18 12:10:31 -040042 if (!dm644x_eth_phy_read(phy_addr, PHY_PHYIDR1, &id1))
Sergey Kubushync74b2102007-08-10 20:26:18 +020043 return(0);
Hugo Villeneuvefec61432008-06-18 12:10:31 -040044 if (!dm644x_eth_phy_read(phy_addr, PHY_PHYIDR2, &id2))
Sergey Kubushync74b2102007-08-10 20:26:18 +020045 return(0);
46
47 if ((id1 == (0x0013)) && ((id2 & 0xfff0) == 0x78e0))
48 return(1);
49
50 return(0);
51}
52
53int lxt972_get_link_speed(int phy_addr)
54{
55 u_int16_t stat1, tmp;
56 volatile emac_regs* emac = (emac_regs *)EMAC_BASE_ADDR;
57
58 if (!dm644x_eth_phy_read(phy_addr, PHY_LXT971_STAT2, &stat1))
59 return(0);
60
61 if (!(stat1 & PHY_LXT971_STAT2_LINK)) /* link up? */
62 return(0);
63
64 if (!dm644x_eth_phy_read(phy_addr, PHY_LXT971_DIG_CFG, &tmp))
65 return(0);
66
67 tmp |= PHY_LXT971_DIG_CFG_MII_DRIVE;
68
69 dm644x_eth_phy_write(phy_addr, PHY_LXT971_DIG_CFG, tmp);
70 /* Read back */
71 if (!dm644x_eth_phy_read(phy_addr, PHY_LXT971_DIG_CFG, &tmp))
72 return(0);
73
74
75 /* Speed doesn't matter, there is no setting for it in EMAC... */
76 if (stat1 & PHY_LXT971_STAT2_100BTX) {
77 if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) {
78 /* set DM644x EMAC for Full Duplex */
79 emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE | EMAC_MACCONTROL_FULLDUPLEX_ENABLE;
80 } else {
81 /*set DM644x EMAC for Half Duplex */
82 emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE;
83 }
84
85 return(1);
86 } else {
87 if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) {
88 /* set DM644x EMAC for Full Duplex */
89 emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE | EMAC_MACCONTROL_FULLDUPLEX_ENABLE;
90 } else {
91 /*set DM644x EMAC for Half Duplex */
92 emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE;
93 }
94
95 return(1);
96 }
97
98 return(0);
99}
100
101
102int lxt972_init_phy(int phy_addr)
103{
104 int ret = 1;
105
106 if (!lxt972_get_link_speed(phy_addr)) {
107 /* Try another time */
108 ret = lxt972_get_link_speed(phy_addr);
109 }
110
111 /* Disable PHY Interrupts */
112 dm644x_eth_phy_write(phy_addr, PHY_LXT971_INT_ENABLE, 0);
113
114 return(ret);
115}
116
117
118int lxt972_auto_negotiate(int phy_addr)
119{
120 u_int16_t tmp;
121
122
Hugo Villeneuvefec61432008-06-18 12:10:31 -0400123 if (!dm644x_eth_phy_read(phy_addr, PHY_BMCR, &tmp))
Sergey Kubushync74b2102007-08-10 20:26:18 +0200124 return(0);
125
126 /* Restart Auto_negotiation */
Hugo Villeneuvefec61432008-06-18 12:10:31 -0400127 tmp |= PHY_BMCR_RST_NEG;
128 dm644x_eth_phy_write(phy_addr, PHY_BMCR, tmp);
Sergey Kubushync74b2102007-08-10 20:26:18 +0200129
130 /*check AutoNegotiate complete */
131 udelay (10000);
Hugo Villeneuvefec61432008-06-18 12:10:31 -0400132 if (!dm644x_eth_phy_read(phy_addr, PHY_BMSR, &tmp))
Sergey Kubushync74b2102007-08-10 20:26:18 +0200133 return(0);
134
Hugo Villeneuvefec61432008-06-18 12:10:31 -0400135 if (!(tmp & PHY_BMSR_AUTN_COMP))
Sergey Kubushync74b2102007-08-10 20:26:18 +0200136 return(0);
137
138 return (lxt972_get_link_speed(phy_addr));
139}
140
141#endif /* CONFIG_CMD_NET */
142
143#endif /* CONFIG_DRIVER_ETHER */