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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Fabio Estevam860b32e2011-05-13 03:15:11 +00002/*
3 * Copyright (C) 2011 Freescale Semiconductor, Inc.
4 *
Fabio Estevamc4c596f2011-09-22 08:07:20 +00005 * Configuration settings for the MX53SMD Freescale board.
Fabio Estevam860b32e2011-05-13 03:15:11 +00006 */
7
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
Fabio Estevamc4c596f2011-09-22 08:07:20 +000011#define CONFIG_MACH_TYPE MACH_TYPE_MX53_SMD
12
Fabio Estevam860b32e2011-05-13 03:15:11 +000013#include <asm/arch/imx-regs.h>
14
15#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
Fabio Estevam860b32e2011-05-13 03:15:11 +000016#define CONFIG_SETUP_MEMORY_TAGS
17#define CONFIG_INITRD_TAG
Fabio Estevamfd622f22013-04-24 14:44:26 +000018#define CONFIG_REVISION_TAG
Fabio Estevam860b32e2011-05-13 03:15:11 +000019
Gong Qianyu18fb0e32015-10-26 19:47:42 +080020#define CONFIG_SYS_FSL_CLK
Fabio Estevam5a416df2014-04-22 15:34:57 -030021
Fabio Estevam860b32e2011-05-13 03:15:11 +000022/* Size of malloc() pool */
23#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
24
Fabio Estevam860b32e2011-05-13 03:15:11 +000025#define CONFIG_MXC_UART
Stefano Babic40f6fff2011-11-22 15:22:39 +010026#define CONFIG_MXC_UART_BASE UART1_BASE
Fabio Estevam860b32e2011-05-13 03:15:11 +000027
28/* I2C Configs */
tremb089d032013-09-21 18:13:36 +020029#define CONFIG_SYS_I2C
30#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)03544c62015-09-21 22:43:38 +020031#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
32#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf8cb1012015-03-20 10:20:40 -070033#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Fabio Estevam860b32e2011-05-13 03:15:11 +000034
35/* MMC Configs */
Fabio Estevam860b32e2011-05-13 03:15:11 +000036#define CONFIG_SYS_FSL_ESDHC_ADDR 0
37#define CONFIG_SYS_FSL_ESDHC_NUM 1
38
Fabio Estevam860b32e2011-05-13 03:15:11 +000039/* Eth Configs */
40#define CONFIG_HAS_ETH1
Fabio Estevam860b32e2011-05-13 03:15:11 +000041#define CONFIG_MII
Fabio Estevam860b32e2011-05-13 03:15:11 +000042
43#define CONFIG_FEC_MXC
44#define IMX_FEC_BASE FEC_BASE_ADDR
45#define CONFIG_FEC_MXC_PHYADDR 0x1F
46
Fabio Estevam860b32e2011-05-13 03:15:11 +000047/* allow to overwrite serial and ethaddr */
48#define CONFIG_ENV_OVERWRITE
Fabio Estevam860b32e2011-05-13 03:15:11 +000049
50/* Command definition */
Fabio Estevam860b32e2011-05-13 03:15:11 +000051
Wolfgang Grandegger28b119e2011-10-17 08:21:56 +000052#define CONFIG_ETHPRIME "FEC0"
Fabio Estevam860b32e2011-05-13 03:15:11 +000053
54#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
Fabio Estevam860b32e2011-05-13 03:15:11 +000055
56#define CONFIG_EXTRA_ENV_SETTINGS \
57 "script=boot.scr\0" \
58 "uimage=uImage\0" \
59 "mmcdev=0\0" \
60 "mmcpart=2\0" \
61 "mmcroot=/dev/mmcblk0p3 rw\0" \
62 "mmcrootfstype=ext3 rootwait\0" \
63 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
64 "root=${mmcroot} " \
65 "rootfstype=${mmcrootfstype}\0" \
66 "loadbootscript=" \
67 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
68 "bootscript=echo Running bootscript from mmc ...; " \
69 "source\0" \
70 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
71 "mmcboot=echo Booting from mmc ...; " \
72 "run mmcargs; " \
73 "bootm\0" \
74 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \
75 "root=/dev/nfs " \
76 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
77 "netboot=echo Booting from net ...; " \
78 "run netargs; " \
79 "dhcp ${uimage}; bootm\0" \
80
81#define CONFIG_BOOTCOMMAND \
Andrew Bradford66968112012-10-01 05:06:52 +000082 "mmc dev ${mmcdev}; if mmc rescan; then " \
Fabio Estevam860b32e2011-05-13 03:15:11 +000083 "if run loadbootscript; then " \
84 "run bootscript; " \
85 "else " \
86 "if run loaduimage; then " \
87 "run mmcboot; " \
88 "else run netboot; " \
89 "fi; " \
90 "fi; " \
91 "else run netboot; fi"
92#define CONFIG_ARP_TIMEOUT 200UL
93
94/* Miscellaneous configurable options */
Fabio Estevam860b32e2011-05-13 03:15:11 +000095
Fabio Estevam860b32e2011-05-13 03:15:11 +000096#define CONFIG_SYS_MEMTEST_START 0x70000000
Fabio Estevam869aed72012-02-09 14:25:10 +000097#define CONFIG_SYS_MEMTEST_END 0x70010000
Fabio Estevam860b32e2011-05-13 03:15:11 +000098
99#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
100
Fabio Estevam860b32e2011-05-13 03:15:11 +0000101/* Physical Memory Map */
102#define CONFIG_NR_DRAM_BANKS 2
103#define PHYS_SDRAM_1 CSD0_BASE_ADDR
104#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
105#define PHYS_SDRAM_2 CSD1_BASE_ADDR
106#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
107#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
108
109#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
110#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
111#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
112
113#define CONFIG_SYS_INIT_SP_OFFSET \
114 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
115#define CONFIG_SYS_INIT_SP_ADDR \
116 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
117
Masahiro Yamadae856bdc2017-02-11 22:43:54 +0900118/* environment organization */
Fabio Estevam860b32e2011-05-13 03:15:11 +0000119#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
120#define CONFIG_ENV_SIZE (8 * 1024)
Fabio Estevam860b32e2011-05-13 03:15:11 +0000121#define CONFIG_SYS_MMC_ENV_DEV 0
122
Fabio Estevam860b32e2011-05-13 03:15:11 +0000123#endif /* __CONFIG_H */