1. 672e559 ddr: marvell: update ddr controller init and freq by Chris Packham · 7 years ago
  2. 8bddf67 ddr: marvell: update additional ODT setting by Chris Packham · 7 years ago
  3. 2efd27f ddr: marvell: use correct TREFI value by Chris Packham · 7 years ago
  4. dbaf095 ddr: marvell: only assert M_ODT[0] on write for a single CS by Chris Packham · 7 years ago
  5. 1b69ce2 arm: mvebu: ddr3_debug: remove self assignments by xypron.glpk@gmx.de · 7 years ago
  6. a21d636 arm: mvebu: remove self assignment by xypron.glpk@gmx.de · 7 years ago
  7. 90bcc3d driver/ddr: Add support for setting timing in hws_topology_map by Marek Behún · 7 years ago
  8. 51855e8 treewide: remove unneeded semicolons by Masahiro Yamada · 7 years ago
  9. fc0b594 Various, accumulated typos collected from around the tree. by Robert P. J. Day · 8 years ago
  10. a4ca379 drivers: squash lines for immediate return by Masahiro Yamada · 8 years ago
  11. 29b5935 arm: mvebu: a38x: Weed out floating point use by Marek Vasut · 9 years ago
  12. eae4b2b Fix spelling of "occurred". by Vagrant Cascadian · 9 years ago
  13. 44876bf arm: mvebu: Fix ddr3_init() cpu config by Dirk Eibach · 9 years ago
  14. a187559 Use correct spelling of "U-Boot" by Bin Meng · 9 years ago
  15. 4444d23 mvebu: axp: Rename MV_DDR_32BIT to CONFIG_DDR_32BIT by Phil Sutter · 9 years ago
  16. 7e1e59a axp: Fix debugging support in DDR3 write leveling by Phil Sutter · 9 years ago
  17. 698ffab arm: mvebu: Make ECC support configurable on Armada XP by Stefan Roese · 9 years ago
  18. cdf1d24 arm: mvebu: ddr: Fix compilation warning by Stefan Roese · 9 years ago
  19. a21b4f0 arm: mvebu: Fix SAR1_CPU_CORE_MASK by Dirk Eibach · 9 years ago
  20. 544acb0 arm: mvebu: a38x: Remove unsupported topologies by Kevin Smith · 9 years ago
  21. 92a3188 bitops: introduce BIT() definition by Heiko Schocher · 9 years ago
  22. 0ceb2da arm: mvebu: Add complete SDRAM ECC scrubbing by Stefan Roese · 9 years ago
  23. a3ed978 arm: mvebu: sdram: Enable ECC support on Armada XP by Stefan Roese · 9 years ago
  24. ad6ac7a arm: mvebu: a38x: Use correct PEX register access macros by Stefan Roese · 9 years ago
  25. f1df936 arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr by Stefan Roese · 10 years ago
  26. ff9112d arm: mvebu: drivers/ddr: Move Armada XP DDR init code into new directory by Stefan Roese · 10 years ago