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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 143c9a7e9d686d7b2e2a7a1c26cf0c4d82660cc6 / arch / riscv / cpu / generic / Kconfig
  1. 6aabe22 riscv: define a cache line size for the generic CPU by Heinrich Schuchardt · 1 year, 4 months ago
  2. 9675d92 riscv: Rename SiFive CLINT to RISC-V ALINT by Bin Meng · 1 year, 5 months ago
  3. 756eeba riscv: qemu: Switch to use binman to generate u-boot.itb by Bin Meng · 3 years, 7 months ago
  4. a6d7e8c riscv: Split SiFive CLINT support between SPL and U-Boot proper by Bin Meng · 3 years, 7 months ago
  5. 529d5f9 cpu: Rename SPL_CPU_SUPPORT to SPL_CPU by Simon Glass · 3 years, 8 months ago
  6. c33efaf riscv: Rework riscv timer driver to only support S-mode by Sean Anderson · 4 years, 2 months ago
  7. 8c59f20 riscv: add SPL support by Lukas Auer · 5 years ago
  8. fbfd92b riscv: add run mode configuration for SPL by Lukas Auer · 5 years ago
  9. fdff1f9 riscv: Rename cpu/qemu to cpu/generic by Anup Patel · 6 years ago[Renamed (91%) from arch/riscv/cpu/qemu/Kconfig]
  10. b3820ba Merge tag 'efi-2019-04-rc3' of https://github.com/xypron2/u-boot by Tom Rini · 6 years ago