1. 4b5f6c5 DW SPI: use 32 bit access instead of 16 and 32 bit mix by Eugeniy Paltsev · 7 years ago
  2. bcdcb3e DW SPI: add option to use external gpio for chip select by Eugeniy Paltsev · 7 years ago
  3. d3d8aae DW SPI: refactor poll_transfer functions by Eugeniy Paltsev · 7 years ago
  4. fc282c7 DW SPI: fix transmit only mode by Eugeniy Paltsev · 7 years ago
  5. c6b4f03 DW SPI: fix tx data loss on FIFO flush by Eugeniy Paltsev · 7 years ago
  6. 58c125b DW SPI: Get clock value from Device Tree by Eugeniy Paltsev · 7 years ago
  7. a821c4a dm: Rename dev_addr..() functions by Simon Glass · 7 years ago
  8. e160f7d dm: core: Replace of_offset with accessor by Simon Glass · 8 years ago
  9. 95e77d9 spi: designware_spi: Use GENMASK by Jagan Teki · 9 years ago
  10. 431a9f0 spi: designware_spi: Use BIT macro by Jagan Teki · 9 years ago
  11. 4e9838c dm: Use dev_get_addr() where possible by Simon Glass · 9 years ago
  12. 52091ad spi: designware_spi: revisit FIFO size detection again by Axel Lin · 10 years ago
  13. 19a25f6 dm: spi: Move the per-child data size to the uclass by Simon Glass · 10 years ago
  14. 7411486 dt: socfpga: Rename snps, dw-spi-mmio to snps, dw-apb-ssi by Marek Vasut · 10 years ago
  15. 5019436 spi: designware_spi: Fix detecting FIFO depth by Axel Lin · 10 years ago
  16. a72f802 spi: designware_spi: Some fixes / changes by Stefan Roese · 10 years ago
  17. 5bef6fd spi: Add designware master SPI DM driver used on SoCFPGA by Stefan Roese · 10 years ago