1. 185f812 doc: replace @return by Return: by Heinrich Schuchardt · 3 years ago
  2. cd93d62 common: Drop linux/bitops.h from common header by Simon Glass · 4 years, 9 months ago
  3. c05ed00 common: Drop linux/delay.h from common header by Simon Glass · 4 years, 9 months ago
  4. f7ae49f common: Drop log.h from common header by Simon Glass · 4 years, 9 months ago
  5. 691d719 common: Drop init.h from common header by Simon Glass · 4 years, 9 months ago
  6. 90526e9 common: Drop net.h from common header by Simon Glass · 4 years, 9 months ago
  7. d43c1dc i2c: t210: Add VI_I2C clock source support by Tom Warren · 4 years, 10 months ago
  8. d491dc0 t210: do not enable PLLE and UPHY PLL HW PWRSEQ by JC Kuo · 4 years, 10 months ago
  9. bf468e5 ARM: tegra: Remove disp1 clock initialization on Tegra210 by Thierry Reding · 6 years ago
  10. bca7910 ARM: tegra: Fix mux type for disp1 and disp2 clocks on Tegra210 by Thierry Reding · 6 years ago
  11. 83d290c SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · 7 years ago
  12. d0ad8a5 ARM: tegra: add APIs the clock uclass driver will need by Stephen Warren · 8 years ago
  13. 6dbcc96 ARM: tegra: add peripheral clock init table by Stephen Warren · 8 years ago
  14. 8f83759 ARM: tegra210: set PLLE_PTS bit when enabling PLLE by Stephen Warren · 9 years ago
  15. dfa551e ARM: tegra210: implement PLLE init procedure from TRM by Stephen Warren · 9 years ago
  16. 97c02d8 ARM: tegra: clk_m is the architected timer source clock by Thierry Reding · 9 years ago
  17. c043c02 ARM: tegra: Implement clk_m by Thierry Reding · 9 years ago
  18. 5a30cee tegra: Correct logic for reading pll_misc in clock_start_pll() by Simon Glass · 9 years ago
  19. 722e000 Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc. by Tom Warren · 10 years ago
  20. 3e8650c Tegra: clocks: Add 38.4MHz OSC support for T210 use by Tom Warren · 10 years ago
  21. 6c43f6c ARM: Tegra210: Add SoC code/include files for T210 by Tom Warren · 10 years ago