1. 4444d23 mvebu: axp: Rename MV_DDR_32BIT to CONFIG_DDR_32BIT by Phil Sutter · 9 years ago
  2. 7e1e59a axp: Fix debugging support in DDR3 write leveling by Phil Sutter · 9 years ago
  3. 698ffab arm: mvebu: Make ECC support configurable on Armada XP by Stefan Roese · 9 years ago
  4. cdf1d24 arm: mvebu: ddr: Fix compilation warning by Stefan Roese · 9 years ago
  5. a21b4f0 arm: mvebu: Fix SAR1_CPU_CORE_MASK by Dirk Eibach · 9 years ago
  6. 544acb0 arm: mvebu: a38x: Remove unsupported topologies by Kevin Smith · 9 years ago
  7. 92a3188 bitops: introduce BIT() definition by Heiko Schocher · 9 years ago
  8. 0ceb2da arm: mvebu: Add complete SDRAM ECC scrubbing by Stefan Roese · 9 years ago
  9. a3ed978 arm: mvebu: sdram: Enable ECC support on Armada XP by Stefan Roese · 9 years ago
  10. ad6ac7a arm: mvebu: a38x: Use correct PEX register access macros by Stefan Roese · 9 years ago
  11. f1df936 arm: mvebu: Add Armada 38x DDR3 training code from Marvell bin_hdr by Stefan Roese · 10 years ago
  12. ff9112d arm: mvebu: drivers/ddr: Move Armada XP DDR init code into new directory by Stefan Roese · 10 years ago