1. 2d934e5 x86: Rename MMCONF_BASE_ADDRESS and make it common across x86 by Simon Glass · 10 years ago
  2. 380ab5c x86: ivybridge: Drop the Kconfig MRC cache information by Simon Glass · 10 years ago
  3. 191c008 x86: Implement a cache for Memory Reference Code parameters by Simon Glass · 10 years ago
  4. c72f74e x86: ivybridge: Update microcode early in boot by Simon Glass · 10 years ago
  5. 7b00896 x86: ivybridge: Add a way to turn off the CAR by Simon Glass · 10 years ago
  6. aaafcd6 x86: ivybridge: Request MTRRs for DRAM regions by Simon Glass · 10 years ago
  7. 9818a00 x86: ivybridge: Set up an MTRR for the video frame buffer by Simon Glass · 10 years ago
  8. aff2523 x86: Add support for MTRRs by Simon Glass · 10 years ago
  9. 3a5659f x86: ivybridge: Drop support for ROM caching by Simon Glass · 10 years ago
  10. d19ee5c x86: ivybridge: Only run the Video BIOS when video is enabled by Simon Glass · 10 years ago
  11. 8c5224c x86: Use consistent name XXX_ADDR for binary blob flash address by Bin Meng · 10 years ago
  12. b591ee3 x86: Correct problems in the microcode loading by Simon Glass · 10 years ago
  13. cf29e3e x86: ivybridge: Update the microcode by Simon Glass · 10 years ago
  14. 95a5a47 x86: Add post failure codes for bist and car by Bin Meng · 10 years ago
  15. effcf06 x86: Add initial video device init for Intel GMA by Simon Glass · 10 years ago
  16. 2477427 x86: ivybridge: Add northbridge init functions by Simon Glass · 10 years ago
  17. bb80be3 x86: Add init for model 206AX CPU by Simon Glass · 10 years ago
  18. a6d4c45 x86: ivybridge: Set up XHCI USB by Simon Glass · 10 years ago
  19. 9baeca4 x86: ivybridge: Set up EHCI USB by Simon Glass · 10 years ago
  20. 3ac8393 x86: ivybridge: Add SATA init by Simon Glass · 10 years ago
  21. 72cd085 x86: ivybridge: Add additional LPC init by Simon Glass · 10 years ago
  22. 8c74a57 x86: ivybridge: Add PCH init by Simon Glass · 10 years ago
  23. 4e7a6ac x86: ivybridge: Add support for BD82x6x PCH by Simon Glass · 10 years ago
  24. 65dd74a x86: ivybridge: Implement SDRAM init by Simon Glass · 10 years ago
  25. 3eafce0 x86: ivybridge: Add LAPIC support by Simon Glass · 10 years ago
  26. 8e0df06 x86: ivybridge: Add early init for PCH devices by Simon Glass · 10 years ago
  27. 77f9b1f x86: ivybridge: Perform Intel microcode update on boot by Simon Glass · 10 years ago
  28. 94060ff x86: ivybridge: Check BIST value on boot by Simon Glass · 10 years ago
  29. f5fbbe9 x86: ivybridge: Perform initial CPU setup by Simon Glass · 10 years ago
  30. 2b60515 x86: ivybridge: Add early LPC init so that serial works by Simon Glass · 10 years ago
  31. 6e5b12b x86: ivybridge: Enable PCI in early init by Simon Glass · 10 years ago
  32. 70a09c6 x86: chromebook_link: Implement CAR support (cache as RAM) by Simon Glass · 10 years ago
  33. 8ef0757 x86: Add chromebook_link board by Simon Glass · 10 years ago