Gitiles
Code Review
Sign In
gerrit.devboardsforandroid.linaro.org
/
platform
/
external
/
u-boot
/
3f190c55a4211215914126b74357344342329943
/
include
/
fsl_ddr_dimm_params.h
83d290c
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· 7 years ago
ac72757
Revert "drivers/ddr/fsl: Dual-license DDR driver"
by Tom Rini
· 7 years ago
ee3556b
drivers/ddr/fsl: Dual-license DDR driver
by York Sun
· 7 years ago
140ad2d
drivers/ddr/fsl: Cleanup unused variable
by York Sun
· 7 years ago
564e938
drivers/ddr/fsl: Add calculation of register control words
by York Sun
· 7 years ago
c0c32af
drivers/ddr/fsl: Add 3DS RDIMM support
by York Sun
· 7 years ago
5b8031c
Add more SPDX-License-Identifier tags
by Tom Rini
· 9 years ago
03e664d
driver/ddr/fsl: Add support for multiple DDR clocks
by York Sun
· 10 years ago
34e026f
driver/ddr/fsl: Add DDR4 support to Freescale DDR driver
by York Sun
· 11 years ago
5614e71
Driver/DDR: Moving Freescale DDR driver to a common driver
by York Sun
· 11 years ago
[Renamed from arch/powerpc/include/asm/fsl_ddr_dimm_params.h]
7e157b0
mpc8xxx: set x2 DDR3 refresh rate if SPD config requires it
by Valentin Longchamp
· 11 years ago
0dd38a3
powerpc: Fix CamelCase warnings in DDR related code
by Priyanka Jain
· 11 years ago
b61e061
powerpc/mpc8xxx: Add x4 DDR device support
by York Sun
· 11 years ago
73b5396
powerpc/mpc8xxx: Add fine timing support for DDR3
by York Sun
· 12 years ago
08b3f75
powerpc/mpc8xxx: fix recognition of DIMMs with ECC and Address Parity
by York Sun
· 14 years ago
9490ff4
powerpc/8xxx: Enable DDR3 RDIMM support
by york
· 14 years ago
a47a12b
Move arch/ppc to arch/powerpc
by Stefan Roese
· 15 years ago
[Renamed from arch/ppc/include/asm/fsl_ddr_dimm_params.h]
819833a
Move architecture-specific includes to arch/$ARCH/include/asm
by Peter Tyser
· 15 years ago
[Renamed from include/asm-ppc/fsl_ddr_dimm_params.h]
c360cea
fsl-ddr: add the DDR3 SPD infrastructure
by Dave Liu
· 16 years ago
dfb4910
Pass dimm parameters to populate populate controller options
by Haiying Wang
· 16 years ago
[Renamed from cpu/mpc8xxx/ddr/ddr1_2_dimm_params.h]
58e5e9a
FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code.
by Kumar Gala
· 16 years ago