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gerrit.devboardsforandroid.linaro.org
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platform
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external
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u-boot
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44728b8b3d669b06f494aa6a4fbbb8b469ad059b
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arch
/
riscv
/
include
8c59f20
riscv: add SPL support
by Lukas Auer
· 5 years ago
fbfd92b
riscv: add run mode configuration for SPL
by Lukas Auer
· 5 years ago
4d2583d
riscv: Access CSRs using CSR numbers
by Bin Meng
· 5 years ago
268753f
riscv: Sync csr.h with Linux kernel v5.2
by Bin Meng
· 5 years ago
e7dcf56
env: Drop environment.h header file where not needed
by Simon Glass
· 5 years ago
bdce389
riscv: Introduce CONFIG_XIP to support booting from flash
by Rick Chen
· 6 years ago
a1f2487
riscv: Add a SYSCON driver for Andestech's PLMT
by Rick Chen
· 6 years ago
0d38946
riscv: Add a SYSCON driver for Andestech's PLIC
by Rick Chen
· 6 years ago
3dea63c
riscv: add support for multi-hart systems
by Lukas Auer
· 6 years ago
34a0626
riscv: import the supervisor binary interface header file
by Lukas Auer
· 6 years ago
fa33f08
riscv: add infrastructure for calling functions on other harts
by Lukas Auer
· 6 years ago
98a66ff
riscv: Enable CONFIG_SYS_BOOT_RAMDISK_HIGH for using initrd
by Anup Patel
· 6 years ago
1fa625b
riscv: Add place-holder asm/arch/clk.h for driver compilation
by Anup Patel
· 6 years ago
70b8562
riscv: Add asm/dma-mapping.h for DMA mappings
by Anup Patel
· 6 years ago
51ab457
riscv: Save boot hart id to the global data
by Bin Meng
· 6 years ago
57fe5c6
riscv: Add indirect stringification to csr_xxx ops
by Bin Meng
· 6 years ago
3967156
riscv: Add exception codes for xcause register
by Bin Meng
· 6 years ago
ea53f1c
riscv: Add CSR numbers
by Bin Meng
· 6 years ago
644a3cd
riscv: Add a SYSCON driver for SiFive's Core Local Interruptor
by Bin Meng
· 6 years ago
d2db2a8
riscv: Add kconfig option to run U-Boot in S-mode
by Anup Patel
· 6 years ago
52923c6
riscv: cache: Implement i/dcache [status, enable, disable]
by Rick Chen
· 6 years ago
f105d2e
riscv: do not reimplement generic io functions
by Lukas Auer
· 6 years ago
fc8c76f
riscv: make use of the barrier functions from Linux
by Lukas Auer
· 6 years ago
b2c860c
riscv: fix use of incorrectly sized variables
by Lukas Auer
· 6 years ago
5c8fd32
Use _AC and UL macros from linux/const.h
by Baruch Siach
· 6 years ago
e5ea1e5
riscv: Remove CSR read/write defines in encoding.h
by Bin Meng
· 6 years ago
2fab2e9
riscv: Add a helper routine to print CPU information
by Bin Meng
· 6 years ago
8cdc6b5
riscv: Remove mach type
by Bin Meng
· 6 years ago
3ad4866
riscv: Remove setup.h
by Bin Meng
· 6 years ago
3747bdb
arch: types.h: factor out fixed width typedefs to int-ll64.h
by Masahiro Yamada
· 6 years ago
6f4dd62
riscv: cpu: nx25: Rename as ax25
by Rick Chen
· 7 years ago
7215787
SPDX: Convert single license tags to Linux Kernel style
by Rick Chen
· 7 years ago
b66babd
riscv: Add board_quiesce_devices stub
by Alexander Graf
· 7 years ago
a7f99e5
riscv: Add setjmp/longjmp code
by Alexander Graf
· 7 years ago
accdce5
riscv: Define PLATFORM__CLEAR_BIT for generic_clear_bit()
by Bryan O'Donoghue
· 7 years ago
820cba2
riscv: Define PLATFORM__SET_BIT for generic_set_bit()
by Bryan O'Donoghue
· 7 years ago
83d290c
SPDX: Convert all of our single license tags to Linux Kernel style
by Tom Rini
· 7 years ago
22b7e6f
riscv: bootm: Remove ATAGS
by Rick Chen
· 7 years ago
45fc937
riscv: checkpatch: Fix alignment should match open parenthesis
by Rick Chen
· 7 years ago
40717eb
riscv: checkpatch: Fix use of volatile
by Rick Chen
· 7 years ago
bc0818a
riscv: checkpatch: Fix Macro argument reuse
by Rick Chen
· 7 years ago
6020faf
riscv: nx25: include: Add header files to support RISC-V
by Rick Chen
· 7 years ago