1. e04f9d0 board/freescale: Update ddr clk_adjust by Shengzhou Liu · 9 years ago
  2. aa7a222 armv8/ls2080ardb: Update DDR timing to support more UDIMMs by Shengzhou Liu · 9 years ago
  3. 4493721 armv8: LS2080A: Rename LS2085A to reflect LS2080A by Prabhakar Kushwaha · 9 years ago[Renamed from board/freescale/ls2085ardb/ddr.h]
  4. e2b65ea armv8/ls2085ardb: Add support of LS2085ARDB platform by York Sun · 10 years ago