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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 4958af8735207640181c4423e41b24ee7418361a / cpu / mpc85xx
  1. 15fba32 ppc/85xx: Disable all async interrupt sources when we boot by Kumar Gala · 15 years ago
  2. 9f00409 ppc/85xx: Split out cpu_init_early into its own file for NAND_SPL by Kumar Gala · 15 years ago
  3. 0456dbf ppc/85xx: Change cpu_init_early_f so we can use with NAND SPL by Kumar Gala · 15 years ago
  4. 7da5335 ppc/85xx: add boot from NAND/eSDHC/eSPI support by Mingkai Hu · 15 years ago
  5. b2eec28 ppc/85xx: Move code around to prep for NAND_SPL by Kumar Gala · 15 years ago
  6. 206af35 ppc/85xx: Repack tlb_table to save space by Kumar Gala · 15 years ago
  7. d30f904 ppc/85xx: Introduce low level write_tlb function by Kumar Gala · 15 years ago
  8. 3e3c9c1 ppc/85xx: Remove some bogus code from external interrupt handler. by Scott Wood · 15 years ago
  9. dcc87dd ppc/85xx: Ensure that MAS8 is zero when writing TLB entries. by Scott Wood · 15 years ago
  10. 1b72dbe ppc/85xx: Don't enable interrupts before we're ready by Scott Wood · 15 years ago
  11. 6c97a20 ppc/85xx: Introduce RESET_VECTOR_ADDRESS to handle non-standard link address by Kumar Gala · 15 years ago
  12. c348322 ppc/85xx: Clean up do_reset by Kumar Gala · 15 years ago
  13. 21170c8 ppc/85xx/86xx: Bug fix: call to puts in probecpu() moved to checkcpu(). by Poonam Aggrwal · 15 years ago
  14. f8027f6 ppc/85xx/86xx: Device tree fixup for number of cores by Poonam Aggrwal · 15 years ago
  15. 58442dc ppc/85xx,86xx: Handling Unknown SOC version by Poonam Aggrwal · 15 years ago
  16. 5052a77 ppc/85xx: Cleanup makefile and related optional files by Kumar Gala · 15 years ago
  17. c725908 ppc/85xx: Fix bug in setup_mp code by Kumar Gala · 15 years ago
  18. c2287af ppc/85xx: Add a simple function to search the TLB by Kumar Gala · 15 years ago
  19. 26f4cdba 85xx: Add support for setting IVORs to fixed offset defaults by Kumar Gala · 15 years ago
  20. da1cd95 ppc/85xx: Fix up eSDHC controller clock frequency in the device tree by Dipen Dudhat · 15 years ago
  21. 2abbd31 ppc/8xxx: Remove ddr_pd_cntl register since it doesn't exist by Kumar Gala · 15 years ago
  22. 6b9ea08 ppc/85xx: Use CONFIG_FSL_ESDHC to enable sdhc clk by Dipen Dudhat · 15 years ago
  23. 05f6f66 85xx: Improve MPIC initialization by Timur Tabi · 15 years ago
  24. a713ba9 85xx: Added single core members of FSL P1xx/P2xx processors series by Poonam Aggrwal · 15 years ago
  25. 76b474e 85xx: Add L2SRAM Register's macro definition by Mingkai Hu · 15 years ago
  26. ec79d33 85xx: Move to a common linker script by Kumar Gala · 15 years ago
  27. 87c7661 85xx: Added P1020 Processor Support. by Poonam Aggrwal · 15 years ago
  28. 0e87098 8xxx: Removed CONFIG_NUM_CPUS from 85xx/86xx by Poonam Aggrwal · 15 years ago
  29. 18bacc2 8xxx: Refactored common cpu specific code for 85xx/86xx into one file. by Poonam Aggrwal · 15 years ago
  30. 53efa1f 85xx: Remove redudant PLATFORM_CPPFLAGS by Kumar Gala · 15 years ago
  31. 963f2f6 Prepare 2009.08-rc3 by Wolfgang Denk · 15 years ago
  32. e393e2e 85xx: Fix addrmap to include memory by Kumar Gala · 15 years ago
  33. 4c2e3da Update Freescale copyrights to remove "All Rights Reserved" by Kumar Gala · 15 years ago
  34. 0d595f7 fsl_dma: Break out common memory initialization function by Peter Tyser · 15 years ago
  35. 79f4333 8xxx: Move dma_init() call to common code by Peter Tyser · 15 years ago
  36. 191c711 fsl_dma: Move dma function prototypes to common header file by Peter Tyser · 15 years ago
  37. 7892f61 8xxx: Rename dma_xfer() to dmacpy() by Peter Tyser · 15 years ago
  38. 017f11f 8xxx: Break out DMA code to a common file by Peter Tyser · 15 years ago
  39. 2f21ce4 fsl/85xx, 86xx: Sync up DMA code by Peter Tyser · 16 years ago
  40. b1f1265 fsl: Create common fsl_dma.h for 85xx and 86xx cpus by Peter Tyser · 16 years ago
  41. 8e55258 qe: Pass in uec_info struct through uec_initialize by Haiying Wang · 15 years ago
  42. b3d7f20 85xx: Add QE clk support by Haiying Wang · 16 years ago
  43. 71b358c 85xx: Added MPC8535/E identifiers by Kumar Gala · 16 years ago
  44. 22419d7 85xx: Always attempt ethernet device tree fixup by Kumar Gala · 16 years ago
  45. d4b130d 85xx: Use print_size to report amount of memory not mapped by TLBs by Kumar Gala · 15 years ago
  46. 90d13b8 85xx: bugfix for reading maximum TLB size on mpc85xx by Fredrik Arnerup · 15 years ago
  47. c840d26 85xx: Introduce determine_mp_bootpg() helper. by Kumar Gala · 16 years ago
  48. 22b6dbc MPC85xx: Add MPC8569 CPU support by Haiying Wang · 16 years ago
  49. 1b3e404 85xx: Add support for additional e500mc features by Kumar Gala · 16 years ago
  50. c360cea fsl-ddr: add the DDR3 SPD infrastructure by Dave Liu · 16 years ago
  51. 0ee84b8 Fix mpc85xx ddr-gen3 ddr_sdram_cfg. by Ed Swarthout · 16 years ago
  52. 1bba30e Coding style cleanup, update CHANGELOG by Wolfgang Denk · 16 years ago
  53. 80522dc 85xx: Add eSDHC support for 8536 DS by Andy Fleming · 16 years ago
  54. e1be0d2 32bit BUg fix for DDR2 on 8572 by Poonam_Aggrwal-b10812 · 16 years ago
  55. 8d949af mpc85xx: Add support for the P2020 by Srikanth Srinivasan · 16 years ago
  56. f8523cb 85xx: Fix how we map DDR memory by Kumar Gala · 16 years ago
  57. b29dee3 85xx: Format cpu freq printing to handle 8 cores by Kumar Gala · 16 years ago
  58. 2fc7eb0 Add secondary CPUs processor frequency for e500 core by Haiying Wang · 16 years ago
  59. 5f91ef6 85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards by Kumar Gala · 16 years ago
  60. 10795f4 85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards by Kumar Gala · 16 years ago
  61. 9502643 Change DDR tlb start entry to CONFIG param for 85xx by Haiying Wang · 16 years ago
  62. ada591d mpc8[56]xx: Put localbus clock in sysinfo and gd by Trent Piepho · 16 years ago
  63. 446c381 mpc8568: Double local bus clock divider by Trent Piepho · 16 years ago
  64. f51f07e 85xx: Fix the boot window issue by Dave Liu · 16 years ago
  65. 181a365 Set IVPR to kenrel entry point in second core boot page by Haiying Wang · 16 years ago
  66. a5d212a mpc8xxx: LCRR[CLKDIV] is sometimes five bits by Trent Piepho · 16 years ago
  67. 58ec486 mpc8[56]xx: Put localbus clock in device tree by Trent Piepho · 16 years ago
  68. ecf5b98 85xx: Add support to populate addr map based on TLB settings by Kumar Gala · 16 years ago
  69. 561858e Update U-Boot's build timestamp on every compile by Peter Tyser · 16 years ago
  70. 9df5953 85xx: init gd as early as possible by Kumar Gala · 16 years ago
  71. aed461a 85xx: Fix relocation of CCSRBAR by Kumar Gala · 16 years ago
  72. 9427ccd 85xx: Add PORDEVSR_PCI1 define by Peter Tyser · 16 years ago
  73. a2cd50e 85xx: Add CPU 2 errata workaround to all 8548 boards by Peter Tyser · 16 years ago
  74. 0e8454e Moved initialization of QE Ethernet controller to cpu_eth_init() by Ben Warren · 16 years ago
  75. 3456a14 Moved initialization of FCC Ethernet controller to cpu_eth_init by Ben Warren · 16 years ago
  76. 62e15b4 Fix typo in cpu/mpc85xx/cpu.c by Ben Warren · 16 years ago
  77. ae5f943 85xx: Fix the incorrect register used for DDR erratum1 by Dave Liu · 16 years ago
  78. 0f060c3 85xx: Add basic e500mc core support by Kumar Gala · 16 years ago
  79. a38a5b6 85xx: Use CONFIG_SYS_CACHELINE_SIZE instead of magic number by Kumar Gala · 16 years ago
  80. 08ef89e Use strmhz() to format clock frequencies by Wolfgang Denk · 16 years ago
  81. f82642e Merge 'next' branch by Wolfgang Denk · 16 years ago
  82. 6856b3d 85xx if NUM_CPUS>1, print cpu number by Ed Swarthout · 16 years ago
  83. 0e17f02 Have u-boot pass stashing parameters into device tree by Andy Fleming · 16 years ago
  84. 54e091d 85xx: Export invalidate_{i,d}cache and add flush_dcache by Kumar Gala · 16 years ago
  85. 6d0f6bc rename CFG_ macros to CONFIG_SYS by Jean-Christophe PLAGNIOL-VILLARD · 16 years ago
  86. 42653b8 Revert "85xx: Using proper I2C source clock divider for MPC8544" by Kumar Gala · 16 years ago
  87. dffd244 85xx: Using proper I2C source clock divider for MPC8544 by Wolfgang Grandegger · 16 years ago
  88. c039111 Fix the incorrect DDR clk freq reporting on 8536DS by Jason Jin · 16 years ago
  89. bac6a1d 85xx: Remove setting of *cache-line-size in device trees by Kumar Gala · 16 years ago
  90. 5251469 Fix printf errors under -DDEBUG by Andrew Klossner · 16 years ago
  91. e0ff3d3 85xx: Ensure timebase is zero on secondary cores by Kumar Gala · 16 years ago
  92. 6cc64f9 Removed hardcoded MxMR loop value from upmconfig() for MPC85xx. by Sergei Poselenov · 16 years ago
  93. 75b9d4a Pass in tsec_info struct through tsec_initialize by Andy Fleming · 16 years ago
  94. 9cff444 mpc85xx: remove redudant code with lib_ppc/interrupts.c by Kumar Gala · 16 years ago
  95. ef50d6c mpc85xx: Add support for the MPC8536 by Kumar Gala · 16 years ago
  96. 129ba61 mpc85xx: Add support for the MPC8572DS reference board by Kumar Gala · 16 years ago
  97. 457caec FSL DDR: Remove old SPD support from cpu/mpc85xx by Kumar Gala · 16 years ago
  98. 2a6c2d7 FSL DDR: Add 85xx specific register setting by Kumar Gala · 16 years ago
  99. 6fb1b73 FSL DDR: Add e500 TLB helper for DDR code by Kumar Gala · 16 years ago
  100. 58e5e9a FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · 16 years ago