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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 5614e71b4956c579cd4419b958b33fa6316eaa92 / drivers / ddr / fsl / options.c
  1. 5614e71 Driver/DDR: Moving Freescale DDR driver to a common driver by York Sun · 11 years ago[Renamed (97%) from arch/powerpc/cpu/mpc8xxx/ddr/options.c]
  2. 0dd38a3 powerpc: Fix CamelCase warnings in DDR related code by Priyanka Jain · 11 years ago
  3. b61e061 powerpc/mpc8xxx: Add x4 DDR device support by York Sun · 11 years ago
  4. 1a45966 Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · 11 years ago
  5. 89b7809 powerpc/mpc8xxx: Add auto select bank interleaving mode by York Sun · 12 years ago
  6. 123922b powerpc/mpc8xxx: Fix DDR driver handling quad-rank DIMMs and address calculation by York Sun · 12 years ago
  7. 7ac3cc2 powerpc/mpc8xxx: Move HWCONFIG_BUFFER_SIZE into config.h by York Sun · 12 years ago
  8. a4c6650 powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleaving by York Sun · 12 years ago
  9. 667bc17 arch/powerpc/cpu/mpc8xxx/ddr/options.c: Fix GCC 4.6 build warning by Kumar Gala · 13 years ago
  10. 4e57382 powerpc/mpc8xxx: Add DDR2 to unified DDR driver by York Sun · 13 years ago
  11. cda1de2 powerpc/mpc8xxx: Move DDR RCW overriding to common code by York Sun · 13 years ago
  12. 4c99cb9 powerpc/mpc8xxx: fix DDR data width checking by York Sun · 13 years ago
  13. 51d498f powerpc/mpc8xxx: Add 16-bit support for DDR3 by York Sun · 13 years ago
  14. e090aa7 powerpc/mpc8xxx: adjust DDR burst length and chop accroding to sdram width by York Sun · 13 years ago
  15. e1fd16b mpc85xx: Enable unique mode registers and dynamic ODT for DDR3 by York Sun · 14 years ago
  16. 47df8f0 mpc8xxx: Enable ECC on/off control in hwconfig by York Sun · 14 years ago
  17. dd50af2 powerpc/8xxx: Add hwconfig APIs to address early parsing used by DDR init by Kumar Gala · 14 years ago
  18. 3dbd5d7 powerpc/8xxx: Move fsl_is_spd() into generic 8xxx ddr code by Kumar Gala · 14 years ago
  19. 5fb8a8a powerpc/8xxx: Improvement to DDR parameters by york · 14 years ago
  20. 7fd101c powerpc/8xxx: Enabled address hashing for 85xx by york · 14 years ago
  21. 5800e7a powerpc/8xxx: Enable quad-rank DIMMs. by york · 14 years ago
  22. 076bff8 powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4 by york · 14 years ago
  23. 79e4e64 powerpc/8xxx: Enabled hwconfig for memory interleaving by Kumar Gala · 14 years ago
  24. a47a12b Move arch/ppc to arch/powerpc by Stefan Roese · 15 years ago[Renamed from arch/ppc/cpu/mpc8xxx/ddr/options.c]
  25. 8d1f268 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU by Peter Tyser · 15 years ago[Renamed from cpu/mpc8xxx/ddr/options.c]
  26. 22c9de0 fsl-ddr: change the default burst mode for DDR3 by Dave Liu · 15 years ago
  27. bdc9f7b fsl-ddr: add the override for write leveling by Dave Liu · 15 years ago
  28. 3ad95de fsl-ddr: Fix the chip-select interleaving issue by Dave Liu · 15 years ago
  29. c360cea fsl-ddr: add the DDR3 SPD infrastructure by Dave Liu · 16 years ago
  30. 1542fbd fsl-ddr: ignore memctl_intlv_ctl setting if only one DDR controller by Kumar Gala · 16 years ago
  31. b4983e1 fsl-ddr: use the 1T timing as default configuration by Dave Liu · 16 years ago
  32. 7008d26 fsl ddr skip interleaving if not supported. by Ed Swarthout · 16 years ago
  33. c9ffd83 Check DDR interleaving mode by Haiying Wang · 16 years ago
  34. dfb4910 Pass dimm parameters to populate populate controller options by Haiying Wang · 16 years ago
  35. 58e5e9a FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · 16 years ago