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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 56621644069a944ab475669356496e465f9ac335 / arch / riscv / cpu / cpu.c
  1. a0018fc riscv: Make SiFive HiFive Unleashed board boot again by Bin Meng · 4 years, 4 months ago
  2. b8bc120 riscv: Add option to support RISC-V privileged spec 1.9 by Sean Anderson · 4 years, 5 months ago
  3. 40686c3 riscv: Clean up IPI initialization code by Sean Anderson · 4 years, 5 months ago
  4. cd93d62 common: Drop linux/bitops.h from common header by Simon Glass · 4 years, 6 months ago
  5. 691d719 common: Drop init.h from common header by Simon Glass · 4 years, 6 months ago
  6. fbfd92b riscv: add run mode configuration for SPL by Lukas Auer · 5 years ago
  7. 4d2583d riscv: Access CSRs using CSR numbers by Bin Meng · 5 years ago
  8. f9281b8 riscv: prior_stage_fdt_address should only be used when OF_PRIOR_STAGE is enabled by Rick Chen · 6 years ago
  9. bdce389 riscv: Introduce CONFIG_XIP to support booting from flash by Rick Chen · 6 years ago
  10. 3dea63c riscv: add support for multi-hart systems by Lukas Auer · 6 years ago
  11. 485e822 riscv: Do some basic architecture level cpu initialization by Bin Meng · 6 years ago
  12. aef59e5 riscv: Update supports_extension() to use desc from cpu driver by Bin Meng · 6 years ago
  13. 3c276b2 riscv: Remove non-DM version of print_cpuinfo() by Bin Meng · 6 years ago
  14. 39cad5b riscv: Probe cpus during boot by Bin Meng · 6 years ago
  15. 5d8b2e7 riscv: save hart ID and device tree passed by prior boot stage by Lukas Auer · 6 years ago
  16. 2fab2e9 riscv: Add a helper routine to print CPU information by Bin Meng · 6 years ago