Gitiles
Code Review Sign In
gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 7ad6d9a4ad8a9cbe116647b7613aaec7c263fcf5 / arch / arm / mach-sunxi / clock_sun6i.c
  1. e37a1b1 sunxi: switch PRCM to non-secure on H3/H5 SoCs by Icenowy Zheng · 7 years ago
  2. 9946631 sunxi: add clock configuration of R40 sata by Icenowy Zheng · 8 years ago
  3. 1ae5def sunxi: Add clock support for DE2/HDMI/TCON on newer SoCs by Jernej Skrabec · 8 years ago
  4. 8201188 sunxi: Use H3/A64 DRAM initialization code for R40 by Chen-Yu Tsai · 8 years ago
  5. 328ce7f sunxi: Set PLL lock enable bits for R40 by Chen-Yu Tsai · 8 years ago
  6. 7b82a22 sunxi: prepare for sharing MACH_SUN8I_H3 config symbol by Andre Przywara · 8 years ago
  7. 1bc464b sunxi: A64: use H3 DRAM initialization code for A64 as well by Jens Kuske · 8 years ago
  8. b556159 sunxi: clocks: Use the correct pattern register for PLL11 by Philipp Tomsich · 8 years ago
  9. 2865433 sun6i: Restrict some register initialization to Allwinner A31 SoC by Andre Przywara · 8 years ago
  10. d5ac6ee sunxi: Tune H3 DRAM PLL to improve lock time by Jens Kuske · 8 years ago
  11. e6e505b sunxi: Move cpu independent code to mach directory by Alexander Graf · 9 years ago[Renamed from arch/arm/cpu/armv7/sunxi/clock_sun6i.c]
  12. a93b0fe sunxi: Fix clock_twi_onoff for sun8i-a83 by Hans de Goede · 9 years ago
  13. 730d2f3 sunxi: Fix clock_twi_onoff for sun6i by Hans de Goede · 9 years ago
  14. ed80584 sunxi: Support H3 CCU security switches by Chen-Yu Tsai · 9 years ago
  15. 9d08268 sunxi: Add support for the I2C controller which is part of the PRCM by Jelle van der Waa · 9 years ago
  16. 887e2fd sunxi: twi: Enable clocks on sun7i by Olliver Schinagl · 9 years ago
  17. 52d0931 sunxi: clock: Set AHB1 clock frequency to 200MHz on Allwinner H3 by Siarhei Siamashka · 9 years ago
  18. 55ea98d sun6i: clock: Add support for the mipi pll by Hans de Goede · 9 years ago
  19. 49043cb sunxi: clock: Add clock_get_pll3() helper function by Hans de Goede · 9 years ago
  20. 886a7b4 sunxi: Add support for A33 PLL11 (second DRAM pll) by Hans de Goede · 10 years ago
  21. 22b6183 sunxi: Drop pll6 setting from clock_init_uart by Hans de Goede · 10 years ago
  22. 25508ab sunxi: Fix PLL1 running at half speed on sun8i by Hans de Goede · 10 years ago
  23. 1aac47b sun6i: clock_set_pll5: Calculate k and m rather then hardcoding them by Hans de Goede · 10 years ago
  24. 5af741f sun6i: Add a sigma_delta_enable paramter to clock_set_pll5() by Hans de Goede · 10 years ago
  25. 0bd5125 sunxi: Add video pll clock functions by Hans de Goede · 10 years ago
  26. 62c87ef sun6i: Add clock functions needed for SPL / DRAM init by Hans de Goede · 10 years ago
  27. c757a50 ARM: sunxi: Add support for using R_UART as console by Chen-Yu Tsai · 10 years ago
  28. 14177e4 ARM: sun6i: Add clock support by Chen-Yu Tsai · 10 years ago