1. d0ad8a5 ARM: tegra: add APIs the clock uclass driver will need by Stephen Warren · 8 years ago
  2. 6dbcc96 ARM: tegra: add peripheral clock init table by Stephen Warren · 8 years ago
  3. 8f83759 ARM: tegra210: set PLLE_PTS bit when enabling PLLE by Stephen Warren · 9 years ago
  4. e1cf527 ARM: tegra: note that p2371-2180 is Jetson TX1 by Stephen Warren · 9 years ago
  5. f35cb12 ARM: tegra: error check Tegra210 XUSB padctl waits by Stephen Warren · 9 years ago
  6. 4e4b557 ARM: tegra: add lane tables to Tegra210 XUSB padctl by Stephen Warren · 9 years ago
  7. 7a908c7 ARM: tegra: switch Tegra210 to common XUSB padctl by Stephen Warren · 9 years ago
  8. dfa551e ARM: tegra210: implement PLLE init procedure from TRM by Stephen Warren · 9 years ago
  9. 97c02d8 ARM: tegra: clk_m is the architected timer source clock by Thierry Reding · 9 years ago
  10. c043c02 ARM: tegra: Implement clk_m by Thierry Reding · 9 years ago
  11. 2573428 ARM: tegra: Add p2371-2180 board by Stephen Warren · 9 years ago
  12. 5a30cee tegra: Correct logic for reading pll_misc in clock_start_pll() by Simon Glass · 9 years ago
  13. f05fa67 ARM: tegra: Add p2371-0000 board by Stephen Warren · 9 years ago
  14. b692009 ARM: tegra: Add e2220-1170 board by Stephen Warren · 9 years ago
  15. 722e000 Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc. by Tom Warren · 9 years ago
  16. 3e8650c Tegra: clocks: Add 38.4MHz OSC support for T210 use by Tom Warren · 9 years ago
  17. 873e3ef T210: Add support for 64-bit T210-based P2571 board by Tom Warren · 10 years ago
  18. 6c43f6c ARM: Tegra210: Add SoC code/include files for T210 by Tom Warren · 10 years ago
  19. 0edb3a8 ARM: tegra: pinctrl: move Tegra210 code to the correct dir by Stephen Warren · 10 years ago