1. 76d1d02 board_f: x86: Use checkcpu() for CPU init by Simon Glass · 8 years ago
  2. 8d8f3ac x86: ivybridge: Add more debugging for failures by Simon Glass · 8 years ago
  3. 4cc00f0 x86: Add debugging when cpu_common_init() fails by Simon Glass · 8 years ago
  4. 7e4a6ae x86: Move common PCH code into a common place by Simon Glass · 9 years ago
  5. 50dd3da x86: Move common CPU code to its own place by Simon Glass · 9 years ago
  6. 06d336c x86: Create a common header for Intel register access by Simon Glass · 9 years ago
  7. 9e66506 x86: Move microcode code to a common location by Simon Glass · 9 years ago
  8. 3f603cb dm: Use uclass_first_device_err() where it is useful by Simon Glass · 9 years ago
  9. 5213f28 x86: ivybridge: Convert enable_usb_bar() to use DM PCI API by Simon Glass · 9 years ago
  10. 0c7645b x86: ivybridge: Use the I2C driver to perform SMbus init by Simon Glass · 9 years ago
  11. d46f2a6 x86: ivybridge: Do the SATA init before relocation by Simon Glass · 9 years ago
  12. 9fd11c7 x86: ivybridge: Move GPIO init to the LPC init() method by Simon Glass · 9 years ago
  13. 17e0a9a x86: ivybridge: Move graphics init much later by Simon Glass · 9 years ago
  14. f633efa x86: ivybridge: Probe the LPC in CPU init by Simon Glass · 9 years ago
  15. 655925a x86: ivybridge: Move northbridge init into the probe() method by Simon Glass · 9 years ago
  16. 858361b x86: ivybridge: Rename bd82x6x_init() by Simon Glass · 9 years ago
  17. fe40bd4 x86: ivybridge: Move more init to the probe() function by Simon Glass · 9 years ago
  18. 788cd90 x86: ivybridge: Move lpc_early_init() to probe() by Simon Glass · 9 years ago
  19. 4acc83d x86: ivybridge: Set up the LPC device using driver model by Simon Glass · 9 years ago
  20. 789fa27 x86: Remove HAVE_ACPI_RESUME by Bin Meng · 9 years ago
  21. 80af398 x86: Convert to use driver model timer by Bin Meng · 9 years ago
  22. 7b95252 x86: chromebook_link: Enable the debug UART by Simon Glass · 9 years ago
  23. 5021c81 x86: ivybridge: Use reset_cpu() by Simon Glass · 10 years ago
  24. 90b16d1 x86: chromebook_link: dts: Add PCH and LPC devices by Simon Glass · 10 years ago
  25. aad78d2 dm: x86: pci: Convert chromebook_link to use driver model for pci by Simon Glass · 10 years ago
  26. 161d2e4 x86: Split up arch_cpu_init() by Simon Glass · 10 years ago
  27. 31f57c2 x86: Add a x86_ prefix to the x86-specific PCI functions by Simon Glass · 10 years ago
  28. c72f74e x86: ivybridge: Update microcode early in boot by Simon Glass · 10 years ago
  29. 3a5659f x86: ivybridge: Drop support for ROM caching by Simon Glass · 10 years ago
  30. 95a5a47 x86: Add post failure codes for bist and car by Bin Meng · 10 years ago
  31. 3eafce0 x86: ivybridge: Add LAPIC support by Simon Glass · 10 years ago
  32. 8e0df06 x86: ivybridge: Add early init for PCH devices by Simon Glass · 10 years ago
  33. 77f9b1f x86: ivybridge: Perform Intel microcode update on boot by Simon Glass · 10 years ago
  34. 94060ff x86: ivybridge: Check BIST value on boot by Simon Glass · 10 years ago
  35. f5fbbe9 x86: ivybridge: Perform initial CPU setup by Simon Glass · 10 years ago
  36. 2b60515 x86: ivybridge: Add early LPC init so that serial works by Simon Glass · 10 years ago
  37. 6e5b12b x86: ivybridge: Enable PCI in early init by Simon Glass · 10 years ago
  38. 70a09c6 x86: chromebook_link: Implement CAR support (cache as RAM) by Simon Glass · 10 years ago
  39. 8ef0757 x86: Add chromebook_link board by Simon Glass · 10 years ago