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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / 9e0758b7ff399d39cc62f24ab1c790485030834f / drivers / ddr
  1. 62a3b7d Various, unrelated tree-wide typo fixes. by Robert P. J. Day · 8 years ago
  2. d367404 driver/ddr/fsl: Check condition for erratum A-009803 by Shengzhou Liu · 8 years ago
  3. b06f6f2 drivers/ddr/fsl: Disabling data init if ECC is not enabled by York Sun · 8 years ago
  4. 5605dc6 drivers/ddr/fsl: Fix timing_cfg_2 register by York Sun · 8 years ago
  5. d8e5163 drivers/ddr/fsl: Update clk_adjust of sdram_clk_cntl by Shengzhou Liu · 9 years ago
  6. fc15b9b Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq by Tom Rini · 8 years ago
  7. 29b5935 arm: mvebu: a38x: Weed out floating point use by Marek Vasut · 9 years ago
  8. 019a147 driver/ddr/fsl: Add workaround for erratum A-010165 by Shengzhou Liu · 9 years ago
  9. 5fc62fe driver/ddr/fsl: Add workaround for erratum A-009801 by Shengzhou Liu · 9 years ago
  10. 4a68489 drivers/ddr/fsl: update workaround for erratum A-008511 by Shengzhou Liu · 9 years ago
  11. eae4b2b Fix spelling of "occurred". by Vagrant Cascadian · 9 years ago
  12. e026b98 ddr: altera: Repair DQ window centering code by Marek Vasut · 9 years ago
  13. 85f7662 ddr: altera: Staticize global variables by Marek Vasut · 9 years ago
  14. ea9aa24 ddr: altera: Make DLEVEL behavior inclusive by Marek Vasut · 9 years ago
  15. 70ed80a ddr: altera: Zero DM IN delay in scc_mgr_zero_group() by Marek Vasut · 9 years ago
  16. f3f777c ddr: altera: Remove unnecessary ODT mode config by Marek Vasut · 9 years ago
  17. f5f8c41 ddr: altera: Remove unnecessary update of the SCC by Marek Vasut · 9 years ago
  18. 164eb23 ddr: altera: Fix DRAM end value in protection rule by Marek Vasut · 9 years ago
  19. 8e9e62c ddr: altera: Fix scc_mgr_set() argument order by Marek Vasut · 9 years ago
  20. bba7711 ddr: altera: Tweak DQS tracking enable handling by Marek Vasut · 9 years ago
  21. abaf836 ddr: altera: Replace ad-hoc constant with macro by Marek Vasut · 9 years ago
  22. dd8d8da Fix typo choosen in comments and printf logs by Alexander Merkle · 9 years ago
  23. 44876bf arm: mvebu: Fix ddr3_init() cpu config by Dirk Eibach · 9 years ago
  24. dd8e740 driver/ddr/fsl: Add workaround for erratum A-009803 by Shengzhou Liu · 9 years ago
  25. eb11880 driver/ddr/fsl: Add address parity support for DDR4 UDIMM/discrete by Shengzhou Liu · 9 years ago
  26. a187559 Use correct spelling of "U-Boot" by Bin Meng · 9 years ago
  27. 9ffa7a3 drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32. by Purna Chandra Mandal · 9 years ago
  28. 81dfdee drivers/ddr/fsl: fsl_ddr_sdram_size remove unused controllers by Ed Swarthout · 9 years ago
  29. a994b3d driver/ddr/fsl: Add workaround for A009663 by Shengzhou Liu · 9 years ago
  30. 0d3972c fsl/ddr: Add workaround for ERRATUM_A009942 by Shengzhou Liu · 9 years ago
  31. 5b8031c Add more SPDX-License-Identifier tags by Tom Rini · 9 years ago
  32. 1720fad ddr: altera: Init the rule ID in debug code by Marek Vasut · 9 years ago
  33. 4444d23 mvebu: axp: Rename MV_DDR_32BIT to CONFIG_DDR_32BIT by Phil Sutter · 9 years ago
  34. 7e1e59a axp: Fix debugging support in DDR3 write leveling by Phil Sutter · 9 years ago
  35. 698ffab arm: mvebu: Make ECC support configurable on Armada XP by Stefan Roese · 9 years ago
  36. cdf1d24 arm: mvebu: ddr: Fix compilation warning by Stefan Roese · 9 years ago
  37. 000f4e7 move erratum a008336 and a008514 to soc specific file by Yao Yuan · 9 years ago
  38. a46b185 fsl/ddr: updated ddr errata-A008378 for arm and power SoCs by Shengzhou Liu · 9 years ago
  39. 6c6e006 driver/ddr/fsl: Update timing config for heavy load by York Sun · 9 years ago
  40. 7cc0799 driver/ddr/fsl: Update workaround for A008511 for vref range by York Sun · 9 years ago
  41. 8a51429 driver/ddr/fsl: Update MR5 RTT park by York Sun · 9 years ago
  42. 0fb7197 driver/ddr/fsl: Update DDR4 MR6 for Vref range by York Sun · 9 years ago
  43. 19601dd driver/ddr/fsl: Update DDR4 RTT values by York Sun · 9 years ago
  44. da305b9 drivers/ddr/fsl: Fix typo in BIST test for DDR4 by York Sun · 9 years ago
  45. 61bd2f7 drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3 by York Sun · 9 years ago
  46. 06b5301 armv8: ls2085a: Add support of LS2085A SoC by Prabhakar Kushwaha · 9 years ago
  47. 4493721 armv8: LS2080A: Rename LS2085A to reflect LS2080A by Prabhakar Kushwaha · 9 years ago
  48. a21b4f0 arm: mvebu: Fix SAR1_CPU_CORE_MASK by Dirk Eibach · 9 years ago
  49. 544acb0 arm: mvebu: a38x: Remove unsupported topologies by Kevin Smith · 9 years ago
  50. da58dec Various Makefiles: Add SPDX-License-Identifier tags by Tom Rini · 9 years ago
  51. e368c20 drivers/ddr/fsl_ddr: Make SR_IE configurable by Joakim Tjernlund · 9 years ago
  52. 92a3188 bitops: introduce BIT() definition by Heiko Schocher · 9 years ago
  53. 35e47b7 ddr: altera: Repair uninited variable by Marek Vasut · 9 years ago
  54. 6d7a333 ddr: altera: Replace float multiplication with integer one by Marek Vasut · 9 years ago
  55. 0ceb2da arm: mvebu: Add complete SDRAM ECC scrubbing by Stefan Roese · 9 years ago
  56. a3ed978 arm: mvebu: sdram: Enable ECC support on Armada XP by Stefan Roese · 9 years ago
  57. 139823e ddr: altera: sequencer: Clean checkpatch issues by Marek Vasut · 9 years ago
  58. 5ded732 ddr: altera: sequencer: Clean data types by Marek Vasut · 9 years ago
  59. 96fd436 ddr: altera: sequencer: Pluck out misc macros from code by Marek Vasut · 9 years ago
  60. 3cd0906 ddr: altera: sequencer: Zap SEQ_T(INIT|RESET)_CNTR._VAL by Marek Vasut · 9 years ago
  61. 98cfc90 ddr: altera: sequencer: Zap VFIFO_SIZE by Marek Vasut · 9 years ago
  62. 042ff2d ddr: altera: sequencer: Wrap misc remaining macros by Marek Vasut · 9 years ago
  63. 160695d ddr: altera: sequencer: Pluck out IO_* macros from code by Marek Vasut · 9 years ago
  64. 10c1426 ddr: altera: sequencer: Wrap IO_* macros by Marek Vasut · 9 years ago
  65. 1fa0c8c ddr: altera: sequencer: Pluck out RW_MGR_* macros from code by Marek Vasut · 9 years ago
  66. d718a26 ddr: altera: sequencer: Wrap RW_MGR_* macros by Marek Vasut · 9 years ago
  67. 04955cf ddr: altera: sequencer: Wrap ac_rom_init and inst_rom_init by Marek Vasut · 9 years ago
  68. 499b7a7 ddr: altera: sequencer: Zap bogus redefinition of RW_MGR_MEM_NUMBER_OF_RANKS by Marek Vasut · 9 years ago
  69. f085ac3 ddr: altera: sequencer: Zap unused params and macros by Marek Vasut · 9 years ago
  70. 9c76df5 ddr: altera: sequencer: Move qts-generated files to board dir by Marek Vasut · 9 years ago
  71. 08eb947 ddr: altera: sdram: Make sdram_start and sdram_end into u32 by Marek Vasut · 9 years ago
  72. 6d01595 ddr: altera: sdram: Minor cleanup in sdram_get_rule() by Marek Vasut · 9 years ago
  73. a003740 ddr: altera: sdram: Minor cleanup in sdram_set_rule() by Marek Vasut · 9 years ago
  74. 96b869b ddr: altera: sdram: Add missing kerneldoc by Marek Vasut · 9 years ago
  75. 269de4f ddr: altera: sdram: Clean up sdram_write_verify() by Marek Vasut · 9 years ago
  76. f97606f ddr: altera: sdram: Clean up sdram_calculate_size() part 2 by Marek Vasut · 9 years ago
  77. bb056d9 ddr: altera: sdram: Clean up sdram_calculate_size() part 1 by Marek Vasut · 9 years ago
  78. 5af9141 ddr: altera: sdram: Introduce socfpga_sdram_get_config() by Marek Vasut · 9 years ago
  79. 99f453e ddr: altera: sdram: Clean up sdram_mmr_init_full() part 8 by Marek Vasut · 9 years ago
  80. 1e8a85f ddr: altera: sdram: Clean up sdram_mmr_init_full() part 7 by Marek Vasut · 9 years ago
  81. 1a302a4 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 6 by Marek Vasut · 9 years ago
  82. 9d6b012 ddr: altera: sdram: Clean up sdram_mmr_init_full() part 5 by Marek Vasut · 9 years ago
  83. 076470e ddr: altera: sdram: Clean up sdram_mmr_init_full() part 4 by Marek Vasut · 9 years ago
  84. 764aa9a ddr: altera: sdram: Clean up sdram_mmr_init_full() part 3 by Marek Vasut · 9 years ago
  85. dc3b91d ddr: altera: sdram: Clean up sdram_mmr_init_full() part 2 by Marek Vasut · 9 years ago
  86. be9a9fc ddr: altera: sdram: Clean up sdram_mmr_init_full() part 1 by Marek Vasut · 9 years ago
  87. 04ae448 ddr: altera: sdram: Introduce socfpga_sdram_config() structure by Marek Vasut · 9 years ago
  88. 9a48a9a ddr: altera: sdram: Clean up set_sdr_mp_threshold() by Marek Vasut · 9 years ago
  89. ad2ba5d ddr: altera: sdram: Clean up set_sdr_mp_pacing() by Marek Vasut · 9 years ago
  90. a5ba929 ddr: altera: sdram: Clean up set_sdr_mp_weight() by Marek Vasut · 9 years ago
  91. 1009e39 ddr: altera: sdram: Clean up set_sdr_fifo_cfg() by Marek Vasut · 9 years ago
  92. b3bdb22 ddr: altera: sdram: Clean up set_sdr_static_cfg() by Marek Vasut · 9 years ago
  93. 0ef8830 ddr: altera: sdram: Clean up set_sdr_addr_rw() by Marek Vasut · 9 years ago
  94. 60bd0df ddr: altera: sdram: Clean up set_sdr_dram_timing*() by Marek Vasut · 9 years ago
  95. 067c853 ddr: altera: sdram: Clean up set_sdr_ctrlcfg() by Marek Vasut · 9 years ago
  96. f367169 ddr: altera: sdram: Clean up compute_errata_rows() part 2 by Marek Vasut · 9 years ago
  97. 791d20e ddr: altera: sdram: Clean up compute_errata_rows() part 1 by Marek Vasut · 9 years ago
  98. 58d8614 ddr: altera: sdram: Switch to generic_hweight32() by Marek Vasut · 9 years ago
  99. 3de9622 ddr: altera: Clean up of delay_for_n_mem_clocks() part 5 by Marek Vasut · 9 years ago
  100. 0c1b81b ddr: altera: Clean up of delay_for_n_mem_clocks() part 4 by Marek Vasut · 9 years ago