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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / b135991a3cddd1a266c5fbd64e25eaaa61bde2d8 / arch / powerpc / cpu / mpc85xx / start.S
  1. 24936ed powerpc/corenet: CPC1 speculation disable by Dave Liu · 11 years ago
  2. e982746 powerpc/mpc85xx:Make L2 cache type independent of CHASSIS2 by Prabhakar Kushwaha · 11 years ago
  3. 3765b3e Coding Style cleanup: remove trailing white space by Wolfgang Denk · 11 years ago
  4. 954a1a4 powerpc/mpc85xx: Add workaround for erratum A-005125 by York Sun · 11 years ago
  5. 17b8614 powerpc/srio-pcie-boot: Avoid the NOR_BOOT macro when boot from SRIO/PCIE by Liu Gang · 11 years ago
  6. 1a45966 Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · 11 years ago
  7. 67ad0d5 powerpc/mpc85xx: modify the functionality clear_bss and aligning the end address of the BSS by Ying Zhang · 11 years ago
  8. a71d45d powerpc/mpc85xx: Clear L1 D-cache lock by York Sun · 12 years ago
  9. 9cd95ac Add e6500 L2 replacement policy selection by James Yang · 12 years ago
  10. c416faf Enable L2 cache parity/ECC error checking by James Yang · 12 years ago
  11. 3e4c313 e6500: Move L1 enablement after L2 enablement by Andy Fleming · 12 years ago
  12. cd7ad62 powerpc/mpc85xx: Add definitions for HDBCR registers by Andy Fleming · 12 years ago
  13. 3929fb0 Replace __bss_end__ with __bss_end by Simon Glass · 12 years ago
  14. 31d084d powerpc/mpc85xx: add support for MMUv2 page sizes by Scott Wood · 12 years ago
  15. 4b91972 spl/powerpc: introduce CONFIG_SPL_INIT_MINIMAL by Scott Wood · 12 years ago
  16. 7f0a22f powerpc/mpc85xx: fix TLB alignment by Scott Wood · 12 years ago
  17. f545d30 powerpc/mpc85xx: move debug tlb entry after TLB is in known state by Scott Wood · 12 years ago
  18. 6d2b9da powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500 by York Sun · 12 years ago
  19. 69c7826 powerpc/mpc85xx: Introduce new macros to add and delete TLB entries by York Sun · 12 years ago
  20. 3ea2153 powerpc/85xx: clear out TLB on boot by Scott Wood · 12 years ago
  21. 33eee33 powerpc/fsl-corenet: work around erratum A004510 by Scott Wood · 12 years ago
  22. 89f4289 mpc85xx: Initial SP alignment is wrong. by Joakim Tjernlund · 12 years ago
  23. d16a37b powerpc/85xx:Fix NAND code base to support debugger by Prabhakar Kushwaha · 13 years ago
  24. 689f00f powerpc/85xx:Make debug exception vector accessible by Prabhakar Kushwaha · 13 years ago
  25. 5344f7a powerpc/85xx:Fix MSR[DE] bit in MSR to support debugger by Prabhakar Kushwaha · 13 years ago
  26. 822ad60f powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSR by Timur Tabi · 13 years ago
  27. 119a55f powerpc/85xx:Avoid vector table compilation for nand_spl by Prabhakar Kushwaha · 13 years ago
  28. 64829ba powerpc/85xx:Fix IVORs addr after vector table relocation by Prabhakar Kushwaha · 13 years ago
  29. a4107f8 powerpc/85xx:Avoid hardcoded vector address for IVORs by Prabhakar Kushwaha · 13 years ago
  30. 43f082b powerpc/85xx: Add workaround for erratum CPU-A003999 by Kumar Gala · 13 years ago
  31. 72243c0 powerpc/85xx: resize the boot page TLB before relocating CCSR by Timur Tabi · 13 years ago
  32. 19e4384 powerpc/85xx: verify the current address of CCSR before relocating it by Timur Tabi · 13 years ago
  33. 452ad61 powerpc/85xx: add some missing sync instructions in the CCSR relocation code by Timur Tabi · 13 years ago
  34. c2efa0a powerpc/85xx: fix some comments in the CCSR relocation code by Timur Tabi · 13 years ago
  35. 7065b7d powerpc/p4080: Add support for secure boot flow by Ruchika Gupta · 14 years ago
  36. 6ca88b0 powerpc/85xx: relocate CCSR before creating the initial RAM area by Timur Tabi · 13 years ago
  37. 0a9fe8e powerpc/85xx: provide 85xx flush_icache for cmd_cache by Matthew McClintock · 13 years ago
  38. 09c2e90 unify version_string by Andreas Bießmann · 13 years ago
  39. 8c4734e Revert "PowerPC: Add support for -msingle-pic-base" by Wolfgang Denk · 14 years ago
  40. 39768f7 PowerPC: Add support for -msingle-pic-base by Joakim Tjernlund · 14 years ago
  41. 44c6e65 rename _end to __bss_end__ by Po-Yu Chuang · 14 years ago
  42. 45a6813 powerpc/85xx: Fix bug in dcache_disable by Kumar Gala · 14 years ago
  43. 34bbf61 PowerPC: Don't destroy fixup table while doing fixups by Joakim Tjernlund · 14 years ago
  44. 0635b09 powerpc/85xx: rename CONFIG_SYS_TEXT_BASE to CONFIG_SYS_MONITOR_BASE by Haiying Wang · 14 years ago
  45. 25ddd1f Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value by Wolfgang Denk · 14 years ago
  46. d1e0b10 powerpc: do not fixup NULL ptrs by Joakim Tjernlund · 14 years ago
  47. 14d0a02 Rename TEXT_BASE into CONFIG_SYS_TEXT_BASE by Wolfgang Denk · 14 years ago
  48. 52ebd9c powerpc: Remove warm reset entry point by Peter Tyser · 14 years ago
  49. a3f1852 powerpc/85xx: Move INIT_RAM_ADDR physical address to 36-bit space by york · 14 years ago
  50. a47a12b Move arch/ppc to arch/powerpc by Stefan Roese · 15 years ago[Renamed from arch/ppc/cpu/mpc85xx/start.S]
  51. 8d1f268 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU by Peter Tyser · 15 years ago[Renamed from cpu/mpc85xx/start.S]
  52. ff8473e 85xx: Set HID1[mbdd] on e500v2 rev5.0 or greater by Sandeep Gopalpet · 15 years ago
  53. 69bcf5b 85xx: Add defines for BUCSR bits to make code more readable by Kumar Gala · 15 years ago
  54. 33f57bd 85xx: Fix enabling of L1 cache parity on secondary cores by Kumar Gala · 15 years ago
  55. 0f8aa15 ppc: Use r12 instead of r14 as GOT pointer. by Joakim Tjernlund · 15 years ago
  56. fc4e188 ppc: Loose GOT access in IRQ by Joakim Tjernlund · 15 years ago
  57. 82fd1f8 85xx: Add support for e500mc cache stashing by Kumar Gala · 16 years ago
  58. afc3ba0 relocation: Do not relocate NULL pointers. by Joakim Tjernlund · 15 years ago
  59. 7da5335 ppc/85xx: add boot from NAND/eSDHC/eSPI support by Mingkai Hu · 15 years ago
  60. d30f904 ppc/85xx: Introduce low level write_tlb function by Kumar Gala · 15 years ago
  61. dcc87dd ppc/85xx: Ensure that MAS8 is zero when writing TLB entries. by Scott Wood · 15 years ago
  62. 1b72dbe ppc/85xx: Don't enable interrupts before we're ready by Scott Wood · 15 years ago
  63. 26f4cdba 85xx: Add support for setting IVORs to fixed offset defaults by Kumar Gala · 15 years ago
  64. 22b6dbc MPC85xx: Add MPC8569 CPU support by Haiying Wang · 16 years ago
  65. 1b3e404 85xx: Add support for additional e500mc features by Kumar Gala · 16 years ago
  66. f51f07e 85xx: Fix the boot window issue by Dave Liu · 16 years ago
  67. 561858e Update U-Boot's build timestamp on every compile by Peter Tyser · 16 years ago
  68. 0f060c3 85xx: Add basic e500mc core support by Kumar Gala · 16 years ago
  69. a38a5b6 85xx: Use CONFIG_SYS_CACHELINE_SIZE instead of magic number by Kumar Gala · 16 years ago
  70. 54e091d 85xx: Export invalidate_{i,d}cache and add flush_dcache by Kumar Gala · 16 years ago
  71. 6d0f6bc rename CFG_ macros to CONFIG_SYS by Jean-Christophe PLAGNIOL-VILLARD · 16 years ago
  72. 24ef76f Change the temp map to ROM to align addresses to page size. by Andrew Klossner · 16 years ago
  73. 53677ef Big white-space cleanup. by Wolfgang Denk · 16 years ago
  74. 2b22fa4 85xx: Don't icbi when unlocking the cache by Kumar Gala · 17 years ago
  75. 21fae8b Invalidate INIT_RAM TLB mappings by Andy Fleming · 17 years ago
  76. f57d7d3 ppc: Refactor cache routines, so there is only one common set. by Rafal Jaworowski · 17 years ago
  77. 8716318 85xx: Reworked initial processor init by Kumar Gala · 17 years ago
  78. 54a5070 85xx: Remove old style of LAW init by Kumar Gala · 17 years ago
  79. 83d40df 85xx: Move LAW init code into C by Kumar Gala · 17 years ago
  80. b009f3e 85xx: Remove cache config from configs.h by Kumar Gala · 17 years ago
  81. 992742a Cleanup coding style; update CHANGELOG by Wolfgang Denk · 17 years ago
  82. 1e701e7 MSR overwrite fix by urwithsughosh@gmail.com · 17 years ago
  83. e1ce3cb Remove magic numbers from cache related operations for mpc85xx by Kumar Gala · 17 years ago
  84. 1487adb 85xx io out functions need sync after write. by Ed Swarthout · 17 years ago
  85. 3db0bef Use an absolute address when jumping out of 4k boot page by Kumar Gala · 17 years ago
  86. 61a21e9 85xx start.S cleanup and exception support by Andy Fleming · 17 years ago
  87. 02032e8 [ppc] Fix build breakage for all non-4xx PowerPC variants. by Rafal Jaworowski · 17 years ago
  88. 63247a5 u-boot: v2: Remove the fixed TLB and LAW entrynubmer by Zang Roy-r61911 · 18 years ago
  89. b38dbd4 Fix bug in [id]cache_status commands for MPC85xx processors; by Wolfgang Denk · 19 years ago
  90. 99b0d28 Added support for KwikByte KB920x boards (based on AT91RM9200) by Wolfgang Denk · 19 years ago
  91. 7d31499 E500 update: repoint IVPR to RAM when code is relocated by Wolfgang Denk · 19 years ago
  92. cbf9c11 Merge with /home/wd/git/u-boot/master by Wolfgang Denk · 19 years ago
  93. 3e0bc44 Fix typos in cpu/85xx/start.S which caused DataTLB exception to be by Wolfgang Denk · 19 years ago
  94. b0e3294 * Patch by Ron Alder, 11 July 2005 by Lunsheng Wang · 19 years ago
  95. d9b94f2 * Patch by Jon Loeliger, 2005-05-05 by Jon Loeliger · 19 years ago
  96. 343117b Fix timer handling on MPC85xx systems by wdenk · 20 years ago
  97. 9aea953 Patch by Jon Loeliger, 16 Jul 2004: by wdenk · 20 years ago
  98. 0ac6f8b Patch by Jon Loeliger, 17 June 2004: by wdenk · 20 years ago
  99. 97d80fc Patches Part 1 by Jon Loeliger, 11 May 2004: by wdenk · 20 years ago
  100. a57a496 * Patch by Xiao Xianghua, 23 Oct 2003: small patch for mpc85xx by wdenk · 21 years ago