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gerrit.devboardsforandroid.linaro.org
/
platform
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external
/
u-boot
/
b4983e16d150ab7d039704c310aacbd2f4dc1e0f
/
board
/
stxssa
/
ddr.c
b4983e1
fsl-ddr: use the 1T timing as default configuration
by Dave Liu
· 16 years ago
dfb4910
Pass dimm parameters to populate populate controller options
by Haiying Wang
· 16 years ago
0e7927d
FSL DDR: Convert STXSSA to new DDR code.
by Kumar Gala
· 16 years ago