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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / be45c632568ba76343c1453b3951ad793f482fd5 / cpu / mpc85xx
  1. 0d595f7 fsl_dma: Break out common memory initialization function by Peter Tyser · 15 years ago
  2. 79f4333 8xxx: Move dma_init() call to common code by Peter Tyser · 15 years ago
  3. 191c711 fsl_dma: Move dma function prototypes to common header file by Peter Tyser · 15 years ago
  4. 7892f61 8xxx: Rename dma_xfer() to dmacpy() by Peter Tyser · 15 years ago
  5. 017f11f 8xxx: Break out DMA code to a common file by Peter Tyser · 15 years ago
  6. 2f21ce4 fsl/85xx, 86xx: Sync up DMA code by Peter Tyser · 15 years ago
  7. b1f1265 fsl: Create common fsl_dma.h for 85xx and 86xx cpus by Peter Tyser · 15 years ago
  8. 8e55258 qe: Pass in uec_info struct through uec_initialize by Haiying Wang · 15 years ago
  9. b3d7f20 85xx: Add QE clk support by Haiying Wang · 15 years ago
  10. 71b358c 85xx: Added MPC8535/E identifiers by Kumar Gala · 16 years ago
  11. 22419d7 85xx: Always attempt ethernet device tree fixup by Kumar Gala · 15 years ago
  12. d4b130d 85xx: Use print_size to report amount of memory not mapped by TLBs by Kumar Gala · 15 years ago
  13. 90d13b8 85xx: bugfix for reading maximum TLB size on mpc85xx by Fredrik Arnerup · 15 years ago
  14. c840d26 85xx: Introduce determine_mp_bootpg() helper. by Kumar Gala · 16 years ago
  15. 22b6dbc MPC85xx: Add MPC8569 CPU support by Haiying Wang · 16 years ago
  16. 1b3e404 85xx: Add support for additional e500mc features by Kumar Gala · 16 years ago
  17. c360cea fsl-ddr: add the DDR3 SPD infrastructure by Dave Liu · 16 years ago
  18. 0ee84b8 Fix mpc85xx ddr-gen3 ddr_sdram_cfg. by Ed Swarthout · 16 years ago
  19. 1bba30e Coding style cleanup, update CHANGELOG by Wolfgang Denk · 16 years ago
  20. 80522dc 85xx: Add eSDHC support for 8536 DS by Andy Fleming · 16 years ago
  21. e1be0d2 32bit BUg fix for DDR2 on 8572 by Poonam_Aggrwal-b10812 · 16 years ago
  22. 8d949af mpc85xx: Add support for the P2020 by Srikanth Srinivasan · 16 years ago
  23. f8523cb 85xx: Fix how we map DDR memory by Kumar Gala · 16 years ago
  24. b29dee3 85xx: Format cpu freq printing to handle 8 cores by Kumar Gala · 16 years ago
  25. 2fc7eb0 Add secondary CPUs processor frequency for e500 core by Haiying Wang · 16 years ago
  26. 5f91ef6 85xx: Convert CONFIG_SYS_PCI*_IO_BASE to _IO_BUS for FSL boards by Kumar Gala · 16 years ago
  27. 10795f4 85xx: Convert CONFIG_SYS_{PCI*,RIO*}_MEM_BASE to _MEM_BUS for FSL boards by Kumar Gala · 16 years ago
  28. 9502643 Change DDR tlb start entry to CONFIG param for 85xx by Haiying Wang · 16 years ago
  29. ada591d mpc8[56]xx: Put localbus clock in sysinfo and gd by Trent Piepho · 16 years ago
  30. 446c381 mpc8568: Double local bus clock divider by Trent Piepho · 16 years ago
  31. f51f07e 85xx: Fix the boot window issue by Dave Liu · 16 years ago
  32. 181a365 Set IVPR to kenrel entry point in second core boot page by Haiying Wang · 16 years ago
  33. a5d212a mpc8xxx: LCRR[CLKDIV] is sometimes five bits by Trent Piepho · 16 years ago
  34. 58ec486 mpc8[56]xx: Put localbus clock in device tree by Trent Piepho · 16 years ago
  35. ecf5b98 85xx: Add support to populate addr map based on TLB settings by Kumar Gala · 16 years ago
  36. 561858e Update U-Boot's build timestamp on every compile by Peter Tyser · 16 years ago
  37. 9df5953 85xx: init gd as early as possible by Kumar Gala · 16 years ago
  38. aed461a 85xx: Fix relocation of CCSRBAR by Kumar Gala · 16 years ago
  39. 9427ccd 85xx: Add PORDEVSR_PCI1 define by Peter Tyser · 16 years ago
  40. a2cd50e 85xx: Add CPU 2 errata workaround to all 8548 boards by Peter Tyser · 16 years ago
  41. 0e8454e Moved initialization of QE Ethernet controller to cpu_eth_init() by Ben Warren · 16 years ago
  42. 3456a14 Moved initialization of FCC Ethernet controller to cpu_eth_init by Ben Warren · 16 years ago
  43. 62e15b4 Fix typo in cpu/mpc85xx/cpu.c by Ben Warren · 16 years ago
  44. ae5f943 85xx: Fix the incorrect register used for DDR erratum1 by Dave Liu · 16 years ago
  45. 0f060c3 85xx: Add basic e500mc core support by Kumar Gala · 16 years ago
  46. a38a5b6 85xx: Use CONFIG_SYS_CACHELINE_SIZE instead of magic number by Kumar Gala · 16 years ago
  47. 08ef89e Use strmhz() to format clock frequencies by Wolfgang Denk · 16 years ago
  48. f82642e Merge 'next' branch by Wolfgang Denk · 16 years ago
  49. 6856b3d 85xx if NUM_CPUS>1, print cpu number by Ed Swarthout · 16 years ago
  50. 0e17f02 Have u-boot pass stashing parameters into device tree by Andy Fleming · 16 years ago
  51. 54e091d 85xx: Export invalidate_{i,d}cache and add flush_dcache by Kumar Gala · 16 years ago
  52. 6d0f6bc rename CFG_ macros to CONFIG_SYS by Jean-Christophe PLAGNIOL-VILLARD · 16 years ago
  53. 42653b8 Revert "85xx: Using proper I2C source clock divider for MPC8544" by Kumar Gala · 16 years ago
  54. dffd244 85xx: Using proper I2C source clock divider for MPC8544 by Wolfgang Grandegger · 16 years ago
  55. c039111 Fix the incorrect DDR clk freq reporting on 8536DS by Jason Jin · 16 years ago
  56. bac6a1d 85xx: Remove setting of *cache-line-size in device trees by Kumar Gala · 16 years ago
  57. 5251469 Fix printf errors under -DDEBUG by Andrew Klossner · 16 years ago
  58. e0ff3d3 85xx: Ensure timebase is zero on secondary cores by Kumar Gala · 16 years ago
  59. 6cc64f9 Removed hardcoded MxMR loop value from upmconfig() for MPC85xx. by Sergei Poselenov · 16 years ago
  60. 75b9d4a Pass in tsec_info struct through tsec_initialize by Andy Fleming · 16 years ago
  61. 9cff444 mpc85xx: remove redudant code with lib_ppc/interrupts.c by Kumar Gala · 16 years ago
  62. ef50d6c mpc85xx: Add support for the MPC8536 by Kumar Gala · 16 years ago
  63. 129ba61 mpc85xx: Add support for the MPC8572DS reference board by Kumar Gala · 16 years ago
  64. 457caec FSL DDR: Remove old SPD support from cpu/mpc85xx by Kumar Gala · 16 years ago
  65. 2a6c2d7 FSL DDR: Add 85xx specific register setting by Kumar Gala · 16 years ago
  66. 6fb1b73 FSL DDR: Add e500 TLB helper for DDR code by Kumar Gala · 16 years ago
  67. 58e5e9a FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · 16 years ago
  68. ba37aa0 fdt: rework fdt_fixup_ethernet() to use env instead of bd_t by Kumar Gala · 16 years ago
  69. 902ca09 85xx: Rename CONFIG_NR_CPUS to CONFIG_NUM_CPUS by Kumar Gala · 16 years ago
  70. 1d28d48 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx by Wolfgang Denk · 16 years ago
  71. 73f15a0 85xx: Cleanup L2 cache size detection by Kumar Gala · 16 years ago
  72. 71074ab 8xxx-fdt: set ns16550 clock from CFG_NS16550_CLK, not bi_busfreq by Paul Gortmaker · 16 years ago
  73. 24ef76f Change the temp map to ROM to align addresses to page size. by Andrew Klossner · 16 years ago
  74. 06b4186 mpc85xx: use IS_E_PROCESSOR macro by Kim Phillips · 16 years ago
  75. 6b70ffb fdt: add crypto node handling for MPC8{3, 5}xxE processors by Kim Phillips · 16 years ago
  76. 348753d Fix some more printf() format problems. by Kumar Gala · 16 years ago
  77. dc4b0b3 Fix printf errors. by Andrew Klossner · 16 years ago
  78. 9692cab Merge branch 'master' of git://www.denx.de/git/u-boot-net by Wolfgang Denk · 16 years ago
  79. dd35479 Add mechanisms for CPU and board-specific Ethernet initialization by Ben Warren · 16 years ago
  80. e093a24 Coding Style Cleanup by Wolfgang Denk · 16 years ago
  81. 96026d4 Fix 4xx build issue by Anatolij Gustschin · 16 years ago
  82. 859a86a 85xx/86xx: Move to dynamic mgmt of LAWs by Kumar Gala · 16 years ago
  83. f060054 FSL LAW: Keep track of LAW allocations by Kumar Gala · 16 years ago
  84. 740280e Added the upmconfig() function for 85xx. by Sergei Poselenov · 16 years ago
  85. 6beecfb MPC85xx: Beautify boot output of L2 cache configuration by Wolfgang Grandegger · 16 years ago
  86. 730b2fc 85xx: Add setting of cache props in the device tree. by Kumar Gala · 16 years ago
  87. 4dbdb76 85xx: expose cpu identification by Kumar Gala · 16 years ago
  88. ee1e35b 85xx: Only use PORPLLSR[DDR_Ratio] on platforms that define it by Kumar Gala · 16 years ago
  89. 3b9519f MPC85xx: Change traps.c to not reference non-addressable memory by Becky Bruce · 17 years ago
  90. 0ad4770 Merge branch 'socrates' of /home/wd/git/u-boot/projects by Wolfgang Denk · 16 years ago
  91. 53677ef Big white-space cleanup. by Wolfgang Denk · 16 years ago
  92. 793670c Fixed reset for socrates by Sergei Poselenov · 17 years ago
  93. 70a0f81 85xx: Add -mno-spe to e500/85xx builds by Kumar Gala · 17 years ago
  94. 45239cf 85xx/86xx: Rename ext_refrec to timing_cfg_3 to match docs by Kumar Gala · 17 years ago
  95. cf6cc01 85xx: Additional fixes and cleanup of MP code by Kumar Gala · 17 years ago
  96. 022f121 85xx: Round up frequency calculations to get reasonable output by Kumar Gala · 17 years ago
  97. 0878af1 85xx: Fix size of cpu-release-addr property by Kumar Gala · 17 years ago
  98. 88353a9 Fix calculation of I2C clock for some 85xx chips by Timur Tabi · 17 years ago
  99. 97b3ecb 85xx: Fix detection of MP cpu spin up by Kumar Gala · 17 years ago
  100. f3e04bd 85xx: Use SVR_SOC_VER instead of SVR_VER by Kumar Gala · 17 years ago