1. d0b5d9d arm: make _end compiler-generated by Albert ARIBAUD · 11 years ago
  2. e158665 arm: zynq: correct the argument to lldiv by Siva Durga Prasad Paladugu · 11 years ago
  3. d7e269c zynq: Add support for U-BOOT SPL by Michal Simek · 11 years ago
  4. 96a5d4d zynq: Update CLK in bdinfo by Michal Simek · 11 years ago
  5. d6c9bba zynq: Implement dump clock command by Soren Brinkmann · 11 years ago
  6. 97598fc net: zynq_gem: Calculate clock dividers dynamically by Soren Brinkmann · 11 years ago
  7. 1cd46ed net: zynq_gem: Move RCLK details out of driver by Soren Brinkmann · 11 years ago
  8. 2826fd3 zynq: timer: Fix hangs if network activity attempted after about one hour by Michal Simek · 11 years ago
  9. 614c272 zynq: timer: Migrate to zynq clock framework by Soren Brinkmann · 11 years ago
  10. 6c3e61d zynq: Provide a framework to read clock frequencies by Soren Brinkmann · 11 years ago
  11. 673ba27 zynq: Enable dcache support by Michal Simek · 11 years ago
  12. 3871618 zynq: Fix elf header generation by Michal Simek · 11 years ago
  13. 7f673c9 Merge branch 'master' of git://git.denx.de/u-boot-arm by Tom Rini · 11 years ago
  14. b3de924 zynq: Add support to find bootmode by Jagannadha Sutradharudu Teki · 11 years ago
  15. e83bab8 ARM:zynq: Correct __udelay to use lldiv by Tom Rini · 11 years ago
  16. d44a5f5 Merge branch 'u-boot-microblaze/zynq' into 'u-boot-arm/master' by Albert ARIBAUD · 11 years ago
  17. 85b8c5c Merge branch 'iu-boot/master' into 'u-boot-arm/master' by Albert ARIBAUD · 11 years ago
  18. b5f05b0 arm: zynq : Revert TZ_DDR_RAM to secure. by Radhey Shyam Pandey · 11 years ago
  19. c1824ea arm: zynq: Do not remap OCM to high address by Michal Simek · 11 years ago
  20. 4e1aa84 armv7: convert makefiles to Kbuild style by Masahiro Yamada · 11 years ago
  21. 262f08d zynq: Use arch_cpu_init() instead of lowlevel_init() by Michal Simek · 11 years ago
  22. 3765b3e Coding Style cleanup: remove trailing white space by Wolfgang Denk · 11 years ago
  23. 7ba69b7 arm: zynq: Fix timer loadaddress by Michal Simek · 11 years ago
  24. 39523be zynq: slcr: Wait 100ms till clk is properly setup by Michal Simek · 11 years ago
  25. 148ba55 zynq: Add new ddrc driver for ECC support by Michal Simek · 11 years ago
  26. 1a45966 Add GPL-2.0+ SPDX-License-Identifier to source files by Wolfgang Denk · 11 years ago
  27. d5dae85 fpga: zynq: Add support for loading bitstream by Michal Simek · 11 years ago
  28. 8024352 net: gem: Fix gem driver on 1Gbps LAN by Michal Simek · 12 years ago
  29. 4b21284 zynq: Move scutimer baseaddr to hardware.h by Michal Simek · 11 years ago
  30. d54cc00 arm: zynq: U-Boot udelay < 1000 FIX by David Andrey · 12 years ago
  31. 00ed345 arm: zynq: Add lowlevel initialization to C by Michal Simek · 12 years ago
  32. 59c651f arm: zynq: Add SLCR support with system reset by Michal Simek · 12 years ago
  33. 582601d arm: Move lastinc to arch_global_data by Simon Glass · 12 years ago
  34. 66ee692 arm: Move tbl to arch_global_data by Simon Glass · 12 years ago
  35. 38b343d arm: Support new Xilinx Zynq platform by Michal Simek · 12 years ago