1. 06fc741 mx7ulp_evk: Update DDR freq to 352.8Mhz for ULP B0 by Ye Li · 6 years ago
  2. 9c1563e mx7ulp: Select the SCG1 APLL PFD as a system clock source by Ye Li · 6 years ago
  3. 285aea0 mx7ulp_evk: Change APLL and its PFD0 frequencies by Ye Li · 6 years ago
  4. b4bd5d7 mx7ulp_evk: Update LPDDR3 script by Ye Li · 6 years ago
  5. 72a9414b mx7ulp: Fix APLL num and denom setting issue by Ye Li · 6 years ago
  6. 83d290c SPDX: Convert all of our single license tags to Linux Kernel style by Tom Rini · 7 years ago
  7. 77fa045 imx: imx7ulp: add EVK board support by Peng Fan · 8 years ago