1. dfa551e ARM: tegra210: implement PLLE init procedure from TRM by Stephen Warren · 9 years ago
  2. 97c02d8 ARM: tegra: clk_m is the architected timer source clock by Thierry Reding · 9 years ago
  3. c043c02 ARM: tegra: Implement clk_m by Thierry Reding · 9 years ago
  4. 5a30cee tegra: Correct logic for reading pll_misc in clock_start_pll() by Simon Glass · 9 years ago
  5. 722e000 Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc. by Tom Warren · 9 years ago
  6. 3e8650c Tegra: clocks: Add 38.4MHz OSC support for T210 use by Tom Warren · 9 years ago
  7. 6c43f6c ARM: Tegra210: Add SoC code/include files for T210 by Tom Warren · 10 years ago