1. ec6617c armv8: Support loading 32-bit OS in AArch32 execution state by Alison Wang · 8 years ago
  2. 06d43c8 arm: Set TTB XN bit in case DCACHE_OFF for LPAE mode by Keerthy · 8 years ago
  3. 1ab557a armv8: add hooks for all cache-wide operations by Stephen Warren · 8 years ago
  4. 3ee655e arm: Add PSCI shutdown function by Alexander Graf · 8 years ago
  5. 51bfb5b arm: Disable HVC PSCI calls by default by Alexander Graf · 8 years ago
  6. d31d4a2 ARM: Introduce function to switch to hypervisor mode by Keerthy · 8 years ago
  7. a78cd86 ARM: Rework and correct barrier definitions by Tom Rini · 8 years ago
  8. 5a07abb arm: implement generic PSCI reset call for armv8 by Beniamino Galvani · 9 years ago
  9. d990f5c arm: Add support for HYP mode and LPAE page tables by Alexander Graf · 9 years ago
  10. 53eb45e arm64: Add 32bit arm compatible dcache definitions by Alexander Graf · 9 years ago
  11. 7985cdf arm64: Remove non-full-va map code by Alexander Graf · 9 years ago
  12. 5e2ec77 arm64: Make full va map code more dynamic by Alexander Graf · 9 years ago
  13. 8890c2f arm: Remove S bit from MMU section entry by Marek Vasut · 9 years ago
  14. a592e6f arm: Replace test for CONFIG_ARMV7 with CONFIG_CPU_V7 by Marek Vasut · 9 years ago
  15. a5b9fa3 armv8: Add Secure Monitor/Hypervisor Call (SMC/HVC) infrastructure by Sergey Temerkhanov · 9 years ago
  16. 94f7ff3 armv8: New MMU setup code allowing to use 48+ bits PA/VA by Sergey Temerkhanov · 9 years ago
  17. ba5648c armv8: Add read_mpidr() function by Sergey Temerkhanov · 9 years ago
  18. 88f965d armv8: enable compilation with CONFIG_SYS_NONCACHED_MEMORY by Stephen Warren · 9 years ago
  19. 53fd4b8 arm: mmu: Add missing volatile for reading SCTLR register by Alison Wang · 9 years ago
  20. dad17fd armv8: caches: Added routine to set non cacheable region by Siva Durga Prasad Paladugu · 9 years ago
  21. 5519912 arm: Add a prototype for save_boot_params_ret() by Simon Glass · 10 years ago
  22. 7316987 tegra124: Reserve secure RAM using MC_SECURITY_CFG{0, 1}_0 by Ian Campbell · 10 years ago
  23. 97840b5 ARMv7 TLB: Fixed TTBR0 and Table Descriptors to allow caching by Bryan Brinsko · 10 years ago
  24. dcd468b armv8/fsl-lsch3: Convert flushing L3 to assembly to avoid using stack by York Sun · 10 years ago
  25. e11c6c2 arm: Allow lr to be saved by board code by Simon Glass · 10 years ago
  26. 1dfdd9b ARM: Implement non-cached memory support by Thierry Reding · 10 years ago
  27. 25026fa ARM: cache-cp15: Use more accurate types by Thierry Reding · 10 years ago
  28. ff7e970 arm: cache: Add support for write-allocate D-Cache by Marek Vasut · 10 years ago
  29. 2f78eae ARMv8/FSL_LSCH3: Add FSL_LSCH3 SoC by York Sun · 10 years ago
  30. 1e6ad55 armv8/cache: Change cache invalidate and flush function by York Sun · 11 years ago
  31. 0ae7653 arm64: core support by David Feng · 11 years ago
  32. de63ac2 ARM: mmu: Set domain permissions to client access by R Sricharan · 12 years ago
  33. 2ff467c ARM: add wfi assembly macro by Rob Herring · 12 years ago
  34. 0dde7f5 arm: Add control over cachability of memory regions by Simon Glass · 12 years ago
  35. 819833a Move architecture-specific includes to arch/$ARCH/include/asm by Peter Tyser · 15 years ago[Renamed from include/asm-arm/system.h]
  36. 677e62f arm: update co-processor 15 access by Jean-Christophe PLAGNIOL-VILLARD · 16 years ago