1. 51370d5 ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS by York Sun · 8 years ago
  2. 02fb276 fsl/ddr: Add erratum_a009942_check_cpo and clean related erratum by Shengzhou Liu · 8 years ago
  3. 5b8031c Add more SPDX-License-Identifier tags by Tom Rini · 9 years ago
  4. 61bd2f7 drivers/ddr/fsl: Enable detection of one DDR controller operation for LSCH3 by York Sun · 9 years ago
  5. 5684842 drivers/ddr/fsl: Adjust bstopre value by York Sun · 9 years ago
  6. b92557c driver/ddr/fsl: Add a hook to update SPD address by York Sun · 10 years ago
  7. 66869f9 drivers/ddr/fsl: Update DDR driver for DDR4 by York Sun · 10 years ago
  8. e32d59a driver/ddr/fsl: Add sync of refresh by York Sun · 10 years ago
  9. 03e664d driver/ddr/fsl: Add support for multiple DDR clocks by York Sun · 10 years ago
  10. dda3b61 arm/ls1021a: Add workaround for DDR erratum A008378 by York Sun · 10 years ago
  11. 1d71efb driver/ddr: Restruct driver to allow standalone memory space by York Sun · 10 years ago
  12. 34e026f driver/ddr/fsl: Add DDR4 support to Freescale DDR driver by York Sun · 11 years ago
  13. 4e5b1bd driver/ddr: Change Freescale ARM DDR driver to support both big and little endian by York Sun · 11 years ago
  14. 5614e71 Driver/DDR: Moving Freescale DDR driver to a common driver by York Sun · 11 years ago[Renamed (96%) from arch/powerpc/cpu/mpc8xxx/ddr/ddr.h]
  15. 0dd38a3 powerpc: Fix CamelCase warnings in DDR related code by Priyanka Jain · 11 years ago
  16. c63e137 powerpc/mpc8xxx: Add memory reset control by York Sun · 11 years ago
  17. e8ba6c5 powerpc/mpc8xxxx: FSL DDR debugger auto run of stored commands by James Yang · 12 years ago
  18. 6f5e1dc powerpc/8xxx: Add support for interactive DDR programming interface by York Sun · 13 years ago
  19. 1b3e3c4 powerpc/mpc8xxx: Enable calculation for fixed DDR chips by York Sun · 13 years ago
  20. 5df4b0a powerpc/8xxx: Replace fsl_ddr_get_mem_data_rate with get_ddr_freq() by Kumar Gala · 14 years ago
  21. 856e4b0 powerpc/8xxx: Add additional cycle to write-to-read turnaound for DDR3 by York Sun · 14 years ago
  22. fc0c2b6 8xxx/ddr: add support to only compute the ddr sdram size by Haiying Wang · 14 years ago
  23. 076bff8 powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4 by york · 14 years ago
  24. a47a12b Move arch/ppc to arch/powerpc by Stefan Roese · 15 years ago[Renamed from arch/ppc/cpu/mpc8xxx/ddr/ddr.h]
  25. 8d1f268 ppc: Move cpu/$CPU to arch/ppc/cpu/$CPU by Peter Tyser · 15 years ago[Renamed from cpu/mpc8xxx/ddr/ddr.h]
  26. e7563af fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BIT by Kumar Gala · 15 years ago
  27. dfb4910 Pass dimm parameters to populate populate controller options by Haiying Wang · 16 years ago
  28. 6d0f6bc rename CFG_ macros to CONFIG_SYS by Jean-Christophe PLAGNIOL-VILLARD · 16 years ago
  29. 58e5e9a FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code. by Kumar Gala · 16 years ago