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wdenk531716e2003-09-13 19:01:12 +00001/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25
Wolfgang Denkd87080b2006-03-31 18:32:53 +020026DECLARE_GLOBAL_DATA_PTR;
27
wdenk531716e2003-09-13 19:01:12 +000028#ifdef CONFIG_HARD_I2C
29
30#include <mpc5xxx.h>
31#include <i2c.h>
32
Heiko Schocher00913372010-11-10 08:57:55 +010033#if !defined(CONFIG_I2C_MULTI_BUS)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020034#if (CONFIG_SYS_I2C_MODULE == 2)
wdenk531716e2003-09-13 19:01:12 +000035#define I2C_BASE MPC5XXX_I2C2
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020036#elif (CONFIG_SYS_I2C_MODULE == 1)
wdenk531716e2003-09-13 19:01:12 +000037#define I2C_BASE MPC5XXX_I2C1
dzuab209d52003-09-30 14:08:43 +000038#else
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020039#error CONFIG_SYS_I2C_MODULE is not properly configured
wdenk531716e2003-09-13 19:01:12 +000040#endif
Heiko Schocher00913372010-11-10 08:57:55 +010041#else
42static unsigned int i2c_bus_num __attribute__ ((section (".data"))) =
43 CONFIG_SYS_SPD_BUS_NUM;
44static unsigned int i2c_bus_speed[2] = {CONFIG_SYS_I2C_SPEED,
45 CONFIG_SYS_I2C_SPEED};
46
47static const unsigned long i2c_dev[2] = {
48 MPC5XXX_I2C1,
49 MPC5XXX_I2C2,
50};
51
52#define I2C_BASE ((struct mpc5xxx_i2c *)i2c_dev[i2c_bus_num])
53#endif
wdenk531716e2003-09-13 19:01:12 +000054
Jon Smirl3c853f32009-04-04 17:44:51 -040055#define I2C_TIMEOUT 6667
wdenk531716e2003-09-13 19:01:12 +000056#define I2C_RETRIES 3
57
dzuab209d52003-09-30 14:08:43 +000058struct mpc5xxx_i2c_tap {
59 int scl2tap;
60 int tap2tap;
61};
62
wdenk531716e2003-09-13 19:01:12 +000063static int mpc_reg_in (volatile u32 *reg);
64static void mpc_reg_out (volatile u32 *reg, int val, int mask);
65static int wait_for_bb (void);
66static int wait_for_pin (int *status);
67static int do_address (uchar chip, char rdwr_flag);
68static int send_bytes (uchar chip, char *buf, int len);
69static int receive_bytes (uchar chip, char *buf, int len);
dzuab209d52003-09-30 14:08:43 +000070static int mpc_get_fdr (int);
wdenk531716e2003-09-13 19:01:12 +000071
72static int mpc_reg_in(volatile u32 *reg)
73{
Wolfgang Denk77ddac92005-10-13 16:45:02 +020074 int ret = *reg >> 24;
wdenk531716e2003-09-13 19:01:12 +000075 __asm__ __volatile__ ("eieio");
Wolfgang Denk77ddac92005-10-13 16:45:02 +020076 return ret;
wdenk531716e2003-09-13 19:01:12 +000077}
78
79static void mpc_reg_out(volatile u32 *reg, int val, int mask)
80{
81 int tmp;
82
83 if (!mask) {
84 *reg = val << 24;
85 } else {
86 tmp = mpc_reg_in(reg);
87 *reg = ((tmp & ~mask) | (val & mask)) << 24;
88 }
89 __asm__ __volatile__ ("eieio");
90
91 return;
92}
93
94static int wait_for_bb(void)
95{
96 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
97 int timeout = I2C_TIMEOUT;
98 int status;
99
100 status = mpc_reg_in(&regs->msr);
101
102 while (timeout-- && (status & I2C_BB)) {
103#if 1
104 volatile int temp;
105 mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
106 temp = mpc_reg_in(&regs->mdr);
107 mpc_reg_out(&regs->mcr, 0, I2C_STA);
108 mpc_reg_out(&regs->mcr, 0, 0);
109 mpc_reg_out(&regs->mcr, I2C_EN, 0);
110#endif
Jon Smirl3c853f32009-04-04 17:44:51 -0400111 udelay(15);
wdenk531716e2003-09-13 19:01:12 +0000112 status = mpc_reg_in(&regs->msr);
113 }
114
115 return (status & I2C_BB);
116}
117
118static int wait_for_pin(int *status)
119{
120 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
121 int timeout = I2C_TIMEOUT;
122
123 *status = mpc_reg_in(&regs->msr);
124
125 while (timeout-- && !(*status & I2C_IF)) {
Jon Smirl3c853f32009-04-04 17:44:51 -0400126 udelay(15);
wdenk531716e2003-09-13 19:01:12 +0000127 *status = mpc_reg_in(&regs->msr);
128 }
129
130 if (!(*status & I2C_IF)) {
131 return -1;
132 }
133
134 mpc_reg_out(&regs->msr, 0, I2C_IF);
135
136 return 0;
137}
138
139static int do_address(uchar chip, char rdwr_flag)
140{
141 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
142 int status;
143
144 chip <<= 1;
145
146 if (rdwr_flag) {
147 chip |= 1;
148 }
149
150 mpc_reg_out(&regs->mcr, I2C_TX, I2C_TX);
151 mpc_reg_out(&regs->mdr, chip, 0);
152
wdenk42d1f032003-10-15 23:53:47 +0000153 if (wait_for_pin(&status)) {
154 return -2;
155 }
wdenk531716e2003-09-13 19:01:12 +0000156
wdenk42d1f032003-10-15 23:53:47 +0000157 if (status & I2C_RXAK) {
158 return -3;
159 }
wdenk531716e2003-09-13 19:01:12 +0000160
161 return 0;
162}
163
164static int send_bytes(uchar chip, char *buf, int len)
165{
166 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
167 int wrcount;
168 int status;
169
170 for (wrcount = 0; wrcount < len; ++wrcount) {
171
172 mpc_reg_out(&regs->mdr, buf[wrcount], 0);
173
174 if (wait_for_pin(&status)) {
175 break;
176 }
177
178 if (status & I2C_RXAK) {
179 break;
180 }
181
182 }
183
184 return !(wrcount == len);
185}
186
187static int receive_bytes(uchar chip, char *buf, int len)
188{
189 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
190 int dummy = 1;
191 int rdcount = 0;
192 int status;
193 int i;
194
195 mpc_reg_out(&regs->mcr, 0, I2C_TX);
196
197 for (i = 0; i < len; ++i) {
198 buf[rdcount] = mpc_reg_in(&regs->mdr);
199
200 if (dummy) {
201 dummy = 0;
202 } else {
203 rdcount++;
204 }
205
206
207 if (wait_for_pin(&status)) {
208 return -4;
209 }
210 }
211
212 mpc_reg_out(&regs->mcr, I2C_TXAK, I2C_TXAK);
213 buf[rdcount++] = mpc_reg_in(&regs->mdr);
214
215 if (wait_for_pin(&status)) {
216 return -5;
217 }
218
219 mpc_reg_out(&regs->mcr, 0, I2C_TXAK);
220
221 return 0;
222}
223
Eric Millbrandt5da71ef2009-09-03 08:09:44 -0500224#if defined(CONFIG_SYS_I2C_INIT_MPC5XXX)
225
226#define FDR510(x) (u8) (((x & 0x20) >> 3) | (x & 0x3))
227#define FDR432(x) (u8) ((x & 0x1C) >> 2)
228/*
229 * Reset any i2c devices that may have been interrupted during a system reset.
230 * Normally this would be accomplished by clocking the line until SCL and SDA
231 * are released and then sending a start condtiion (From an Atmel datasheet).
232 * There is no direct access to the i2c pins so instead create start commands
233 * through the i2c interface. Send a start command then delay for the SDA Hold
234 * time, repeat this by disabling/enabling the bus a total of 9 times.
235 */
236static void send_reset(void)
237{
238 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
239 int i;
240 u32 delay;
241 u8 fdr;
242 int SDA_Tap[] = { 3, 3, 4, 4, 1, 1, 2, 2};
243 struct mpc5xxx_i2c_tap scltap[] = {
244 {4, 1},
245 {4, 2},
246 {6, 4},
247 {6, 8},
248 {14, 16},
249 {30, 32},
250 {62, 64},
251 {126, 128}
252 };
253
254 fdr = (u8)mpc_reg_in(&regs->mfdr);
255
256 delay = scltap[FDR432(fdr)].scl2tap + ((SDA_Tap[FDR510(fdr)] - 1) * \
257 scltap[FDR432(fdr)].tap2tap) + 3;
258
259 for (i = 0; i < 9; i++) {
260 mpc_reg_out(&regs->mcr, I2C_EN|I2C_STA|I2C_TX, I2C_INIT_MASK);
261 udelay(delay);
262 mpc_reg_out(&regs->mcr, 0, I2C_INIT_MASK);
263 udelay(delay);
264 }
265
266 mpc_reg_out(&regs->mcr, I2C_EN, I2C_INIT_MASK);
267}
268#endif /* CONFIG_SYS_I2c_INIT_MPC5XXX */
269
wdenk531716e2003-09-13 19:01:12 +0000270/**************** I2C API ****************/
271
272void i2c_init(int speed, int saddr)
273{
274 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
275
276 mpc_reg_out(&regs->mcr, 0, 0);
277 mpc_reg_out(&regs->madr, saddr << 1, 0);
278
279 /* Set clock
280 */
dzuab209d52003-09-30 14:08:43 +0000281 mpc_reg_out(&regs->mfdr, mpc_get_fdr(speed), 0);
wdenk531716e2003-09-13 19:01:12 +0000282
283 /* Enable module
284 */
285 mpc_reg_out(&regs->mcr, I2C_EN, I2C_INIT_MASK);
286 mpc_reg_out(&regs->msr, 0, I2C_IF);
287
Eric Millbrandt5da71ef2009-09-03 08:09:44 -0500288#if defined(CONFIG_SYS_I2C_INIT_MPC5XXX)
289 send_reset();
290#endif
wdenk531716e2003-09-13 19:01:12 +0000291 return;
292}
293
dzuab209d52003-09-30 14:08:43 +0000294static int mpc_get_fdr(int speed)
295{
dzuab209d52003-09-30 14:08:43 +0000296 static int fdr = -1;
dzuab209d52003-09-30 14:08:43 +0000297
298 if (fdr == -1) {
wdenk5cf9da42003-11-07 13:42:26 +0000299 ulong best_speed = 0;
300 ulong divider;
dzuab209d52003-09-30 14:08:43 +0000301 ulong ipb, scl;
302 ulong bestmatch = 0xffffffffUL;
303 int best_i = 0, best_j = 0, i, j;
304 int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8};
305 struct mpc5xxx_i2c_tap scltap[] = {
306 {4, 1},
307 {4, 2},
308 {6, 4},
309 {6, 8},
310 {14, 16},
311 {30, 32},
312 {62, 64},
313 {126, 128}
314 };
315
316 ipb = gd->ipb_clk;
317 for (i = 7; i >= 0; i--) {
318 for (j = 7; j >= 0; j--) {
wdenk42d1f032003-10-15 23:53:47 +0000319 scl = 2 * (scltap[j].scl2tap +
dzuab209d52003-09-30 14:08:43 +0000320 (SCL_Tap[i] - 1) * scltap[j].tap2tap + 2);
321 if (ipb <= speed*scl) {
322 if ((speed*scl - ipb) < bestmatch) {
323 bestmatch = speed*scl - ipb;
324 best_i = i;
325 best_j = j;
326 best_speed = ipb/scl;
327 }
328 }
329 }
330 }
wdenk5cf9da42003-11-07 13:42:26 +0000331 divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
332 if (gd->flags & GD_FLG_RELOC) {
333 fdr = divider;
334 } else {
Jon Smirl33e88c52009-03-22 22:55:45 -0400335 if (gd->have_console)
336 printf("%ld kHz, ", best_speed / 1000);
wdenk5cf9da42003-11-07 13:42:26 +0000337 return divider;
338 }
dzuab209d52003-09-30 14:08:43 +0000339 }
340
341 return fdr;
342}
343
wdenk531716e2003-09-13 19:01:12 +0000344int i2c_probe(uchar chip)
345{
346 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
347 int i;
348
349 for (i = 0; i < I2C_RETRIES; i++) {
350 mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
351
352 if (! do_address(chip, 0)) {
353 mpc_reg_out(&regs->mcr, 0, I2C_STA);
wdenk697037f2004-06-09 15:29:49 +0000354 udelay(500);
wdenk531716e2003-09-13 19:01:12 +0000355 break;
356 }
357
358 mpc_reg_out(&regs->mcr, 0, I2C_STA);
359 udelay(500);
360 }
361
362 return (i == I2C_RETRIES);
363}
364
365int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
366{
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200367 char xaddr[4];
wdenk531716e2003-09-13 19:01:12 +0000368 struct mpc5xxx_i2c * regs = (struct mpc5xxx_i2c *)I2C_BASE;
369 int ret = -1;
370
371 xaddr[0] = (addr >> 24) & 0xFF;
372 xaddr[1] = (addr >> 16) & 0xFF;
373 xaddr[2] = (addr >> 8) & 0xFF;
374 xaddr[3] = addr & 0xFF;
375
376 if (wait_for_bb()) {
Jon Smirl33e88c52009-03-22 22:55:45 -0400377 if (gd->have_console)
378 printf("i2c_read: bus is busy\n");
wdenk531716e2003-09-13 19:01:12 +0000379 goto Done;
380 }
381
382 mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
383 if (do_address(chip, 0)) {
Jon Smirl33e88c52009-03-22 22:55:45 -0400384 if (gd->have_console)
385 printf("i2c_read: failed to address chip\n");
wdenk531716e2003-09-13 19:01:12 +0000386 goto Done;
387 }
388
389 if (send_bytes(chip, &xaddr[4-alen], alen)) {
Jon Smirl33e88c52009-03-22 22:55:45 -0400390 if (gd->have_console)
391 printf("i2c_read: send_bytes failed\n");
wdenk531716e2003-09-13 19:01:12 +0000392 goto Done;
393 }
394
395 mpc_reg_out(&regs->mcr, I2C_RSTA, I2C_RSTA);
396 if (do_address(chip, 1)) {
Jon Smirl33e88c52009-03-22 22:55:45 -0400397 if (gd->have_console)
398 printf("i2c_read: failed to address chip\n");
wdenk531716e2003-09-13 19:01:12 +0000399 goto Done;
400 }
401
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200402 if (receive_bytes(chip, (char *)buf, len)) {
Jon Smirl33e88c52009-03-22 22:55:45 -0400403 if (gd->have_console)
404 printf("i2c_read: receive_bytes failed\n");
wdenk531716e2003-09-13 19:01:12 +0000405 goto Done;
406 }
407
408 ret = 0;
409Done:
410 mpc_reg_out(&regs->mcr, 0, I2C_STA);
411 return ret;
412}
413
414int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
415{
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200416 char xaddr[4];
wdenk531716e2003-09-13 19:01:12 +0000417 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
418 int ret = -1;
419
420 xaddr[0] = (addr >> 24) & 0xFF;
421 xaddr[1] = (addr >> 16) & 0xFF;
422 xaddr[2] = (addr >> 8) & 0xFF;
423 xaddr[3] = addr & 0xFF;
424
wdenk42d1f032003-10-15 23:53:47 +0000425 if (wait_for_bb()) {
Jon Smirl33e88c52009-03-22 22:55:45 -0400426 if (gd->have_console)
427 printf("i2c_write: bus is busy\n");
wdenk531716e2003-09-13 19:01:12 +0000428 goto Done;
429 }
430
wdenk42d1f032003-10-15 23:53:47 +0000431 mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
432 if (do_address(chip, 0)) {
Jon Smirl33e88c52009-03-22 22:55:45 -0400433 if (gd->have_console)
434 printf("i2c_write: failed to address chip\n");
wdenk531716e2003-09-13 19:01:12 +0000435 goto Done;
436 }
437
438 if (send_bytes(chip, &xaddr[4-alen], alen)) {
Jon Smirl33e88c52009-03-22 22:55:45 -0400439 if (gd->have_console)
440 printf("i2c_write: send_bytes failed\n");
wdenk531716e2003-09-13 19:01:12 +0000441 goto Done;
442 }
443
Wolfgang Denk77ddac92005-10-13 16:45:02 +0200444 if (send_bytes(chip, (char *)buf, len)) {
Jon Smirl33e88c52009-03-22 22:55:45 -0400445 if (gd->have_console)
446 printf("i2c_write: send_bytes failed\n");
wdenk531716e2003-09-13 19:01:12 +0000447 goto Done;
448 }
449
450 ret = 0;
451Done:
452 mpc_reg_out(&regs->mcr, 0, I2C_STA);
453 return ret;
454}
455
Heiko Schocher00913372010-11-10 08:57:55 +0100456#if defined(CONFIG_I2C_MULTI_BUS)
457int i2c_set_bus_num(unsigned int bus)
458{
459 if (bus > 1)
460 return -1;
461
462 i2c_bus_num = bus;
463 i2c_init(i2c_bus_speed[bus], CONFIG_SYS_I2C_SLAVE);
464 return 0;
465}
466
467int i2c_set_bus_speed(unsigned int speed)
468{
469 i2c_init(speed, CONFIG_SYS_I2C_SLAVE);
470 return 0;
471}
472
473unsigned int i2c_get_bus_num(void)
474{
475 return i2c_bus_num;
476}
477
478unsigned int i2c_get_bus_speed(void)
479{
480 return i2c_bus_speed[i2c_bus_num];
481}
482#endif
483
484
wdenk531716e2003-09-13 19:01:12 +0000485#endif /* CONFIG_HARD_I2C */