blob: 1a8ab4ee33e1d7e29584f830f6848799f0efe942 [file] [log] [blame]
Stephen Warren8f393772013-02-26 12:28:29 +00001/*
2 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
3 *
Tom Rini5b8031c2016-01-14 22:05:13 -05004 * SPDX-License-Identifier: GPL-2.0
Stephen Warren8f393772013-02-26 12:28:29 +00005 */
6
7#ifndef __MX6_COMMON_H
8#define __MX6_COMMON_H
9
Peng Fan436cf402015-07-20 19:28:26 +080010#ifndef CONFIG_MX6UL
Fabio Estevam6d73c232014-01-29 17:39:49 -020011#ifndef CONFIG_SYS_L2CACHE_OFF
12#define CONFIG_SYS_L2_PL310
13#define CONFIG_SYS_PL310_BASE L2_PL310_BASE
14#endif
15
Gabriel Huaua76df702014-07-26 11:35:43 -070016#define CONFIG_MP
Peng Fan436cf402015-07-20 19:28:26 +080017#endif
18#define CONFIG_BOARD_POSTCLK_INIT
Ye.Lif13ac7b2014-10-30 18:20:59 +080019#define CONFIG_MXC_GPT_HCLK
Gabriel Huaua76df702014-07-26 11:35:43 -070020
Peng Fan1ecd2ea2016-01-04 15:27:22 +080021#define CONFIG_SYS_BOOTM_LEN 0x1000000
22
Peter Robinson056845c2015-05-22 17:30:45 +010023#include <linux/sizes.h>
24#include <asm/arch/imx-regs.h>
25#include <asm/imx-common/gpio.h>
Peter Robinson056845c2015-05-22 17:30:45 +010026
Peter Robinson3b1f6812015-05-22 17:30:46 +010027#ifndef CONFIG_MX6
28#define CONFIG_MX6
29#endif
30
Gong Qianyu18fb0e32015-10-26 19:47:42 +080031#define CONFIG_SYS_FSL_CLK
Peter Robinson3b1f6812015-05-22 17:30:46 +010032
Peter Robinsonea690912015-05-22 17:30:47 +010033/* ATAGs */
34#define CONFIG_CMDLINE_TAG
35#define CONFIG_SETUP_MEMORY_TAGS
36#define CONFIG_INITRD_TAG
37#define CONFIG_REVISION_TAG
38
Peter Robinson81830582015-05-22 17:30:49 +010039/* Boot options */
Peng Fan01140112016-12-11 19:24:32 +080040#if (defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \
41 defined(CONFIG_MX6UL) || defined(CONFIG_MX6SLL))
Fabio Estevamcd6ddc42015-05-28 12:33:34 -030042#define CONFIG_LOADADDR 0x82000000
43#ifndef CONFIG_SYS_TEXT_BASE
44#define CONFIG_SYS_TEXT_BASE 0x87800000
45#endif
46#else
Peter Robinson81830582015-05-22 17:30:49 +010047#define CONFIG_LOADADDR 0x12000000
Peter Robinson81830582015-05-22 17:30:49 +010048#ifndef CONFIG_SYS_TEXT_BASE
49#define CONFIG_SYS_TEXT_BASE 0x17800000
50#endif
Fabio Estevamcd6ddc42015-05-28 12:33:34 -030051#endif
52#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
53
Peter Robinson2d8a0742015-05-22 17:30:50 +010054/* allow to overwrite serial and ethaddr */
55#define CONFIG_ENV_OVERWRITE
56#define CONFIG_CONS_INDEX 1
Peter Robinson2d8a0742015-05-22 17:30:50 +010057
Peter Robinsona380ce62015-05-22 17:30:51 +010058/* Filesystems and image support */
Peter Robinsona380ce62015-05-22 17:30:51 +010059#define CONFIG_SUPPORT_RAW_INITRD
Peter Robinsona380ce62015-05-22 17:30:51 +010060
Peter Robinson2d8a0742015-05-22 17:30:50 +010061/* Miscellaneous configurable options */
Peter Robinson2d8a0742015-05-22 17:30:50 +010062#define CONFIG_SYS_LONGHELP
Peter Robinson2d8a0742015-05-22 17:30:50 +010063#define CONFIG_CMDLINE_EDITING
64#define CONFIG_AUTO_COMPLETE
65#define CONFIG_SYS_CBSIZE 512
66#define CONFIG_SYS_MAXARGS 32
67#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
68
Peter Robinson1022b852015-05-22 17:30:53 +010069#ifndef CONFIG_SYS_DCACHE_OFF
Peter Robinson1022b852015-05-22 17:30:53 +010070#endif
71
Peter Robinson302b2e52015-05-22 17:30:48 +010072/* GPIO */
73#define CONFIG_MXC_GPIO
Peter Robinson302b2e52015-05-22 17:30:48 +010074
Peter Robinsone51c1e82015-05-22 17:30:52 +010075/* MMC */
Peter Robinsone51c1e82015-05-22 17:30:52 +010076#define CONFIG_BOUNCE_BUFFER
77#define CONFIG_FSL_ESDHC
78#define CONFIG_FSL_USDHC
79
Peter Robinson3c73b0a2015-06-24 17:09:46 +010080/* Fuses */
Peter Robinson3c73b0a2015-06-24 17:09:46 +010081#define CONFIG_MXC_OCOTP
82
Gary Bissone22685d2016-08-25 19:03:18 +020083/* Secure boot (HAB) support */
84#ifdef CONFIG_SECURE_BOOT
85#define CONFIG_CSF_SIZE 0x2000
Sven Ebenfeld15b505b2016-11-06 16:37:55 +010086#ifdef CONFIG_SPL_BUILD
87#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
88#endif
Gary Bissone22685d2016-08-25 19:03:18 +020089#endif
90
Stephen Warren8f393772013-02-26 12:28:29 +000091#endif