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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Akshay Saraswat8e4ab1d2014-06-18 17:53:58 +05302/*
3 * Copyright (C) 2013 Samsung Electronics
4 *
5 * Configuration settings for the SAMSUNG/GOOGLE PEACH-PIT board.
Akshay Saraswat8e4ab1d2014-06-18 17:53:58 +05306 */
7
8#ifndef __CONFIG_PEACH_PIT_H
9#define __CONFIG_PEACH_PIT_H
10
Sjoerd Simonsd7e1f022015-03-12 22:33:29 +010011#define MEM_LAYOUT_ENV_SETTINGS \
12 "bootm_size=0x10000000\0" \
13 "kernel_addr_r=0x22000000\0" \
14 "fdt_addr_r=0x23000000\0" \
15 "ramdisk_addr_r=0x23300000\0" \
16 "scriptaddr=0x30000000\0" \
17 "pxefile_addr_r=0x31000000\0"
18
Simon Glass87033d42014-10-07 22:01:46 -060019#include <configs/exynos5420-common.h>
Simon Glass7d159532014-10-07 22:01:47 -060020#include <configs/exynos5-dt-common.h>
Simon Glassbf637ea2015-08-03 08:19:29 -060021#include <configs/exynos5-common.h>
Akshay Saraswat8e4ab1d2014-06-18 17:53:58 +053022
Hyungwon Hwang43900da2014-12-12 14:45:44 +090023#define CONFIG_SYS_SDRAM_BASE 0x20000000
Hyungwon Hwang43900da2014-12-12 14:45:44 +090024#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
25
Akshay Saraswat43581c82014-11-13 22:38:19 +053026/* DRAM Memory Banks */
Akshay Saraswat43581c82014-11-13 22:38:19 +053027#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
28
Akshay Saraswat8e4ab1d2014-06-18 17:53:58 +053029#endif /* __CONFIG_PEACH_PIT_H */