Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 1 | CONFIG_ARM=y |
2 | CONFIG_ARCH_ROCKCHIP=y | ||||
3 | CONFIG_SYS_MALLOC_F_LEN=0x2000 | ||||
4 | CONFIG_ROCKCHIP_RK3288=y | ||||
5 | CONFIG_TARGET_FIREFLY_RK3288=y | ||||
Thomas Chou | e4aa8ed | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 6 | CONFIG_SPL_STACK_R_ADDR=0x80000 |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 7 | CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly" |
8 | CONFIG_SPL_STACK_R=y | ||||
Simon Glass | ec4ac4e | 2016-01-21 19:43:35 -0700 | [diff] [blame] | 9 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 |
Tom Rini | adad96e | 2016-04-21 21:37:19 -0400 | [diff] [blame] | 10 | CONFIG_HUSH_PARSER=y |
Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 11 | CONFIG_CMD_BOOTZ=y |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 12 | # CONFIG_CMD_IMLS is not set |
Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 13 | CONFIG_CMD_MMC=y |
Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 14 | CONFIG_CMD_SF=y |
15 | CONFIG_CMD_SPI=y | ||||
16 | CONFIG_CMD_I2C=y | ||||
17 | CONFIG_CMD_GPIO=y | ||||
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 18 | # CONFIG_CMD_SETEXPR is not set |
Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 19 | CONFIG_CMD_DHCP=y |
Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 20 | CONFIG_CMD_MII=y |
Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 21 | CONFIG_CMD_PING=y |
Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 22 | CONFIG_CMD_CACHE=y |
Tom Rini | 78d1e1d | 2016-04-22 16:41:25 -0400 | [diff] [blame] | 23 | CONFIG_CMD_TIME=y |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 24 | CONFIG_CMD_PMIC=y |
25 | CONFIG_CMD_REGULATOR=y | ||||
Tom Rini | 89cb2b5 | 2016-04-24 17:29:26 -0400 | [diff] [blame] | 26 | CONFIG_CMD_EXT2=y |
27 | CONFIG_CMD_EXT4=y | ||||
28 | CONFIG_CMD_FAT=y | ||||
29 | CONFIG_CMD_FS_GENERIC=y | ||||
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 30 | CONFIG_SPL_OF_CONTROL=y |
Simon Glass | 898d643 | 2016-01-21 19:43:38 -0700 | [diff] [blame] | 31 | CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent" |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 32 | CONFIG_REGMAP=y |
huang lin | 41c7f66 | 2015-11-17 14:20:13 +0800 | [diff] [blame] | 33 | CONFIG_SPL_REGMAP=y |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 34 | CONFIG_SYSCON=y |
Simon Glass | ec4ac4e | 2016-01-21 19:43:35 -0700 | [diff] [blame] | 35 | CONFIG_SPL_SYSCON=y |
Simon Glass | 7991809 | 2016-01-21 19:43:49 -0700 | [diff] [blame] | 36 | # CONFIG_SPL_SIMPLE_BUS is not set |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 37 | CONFIG_CLK=y |
38 | CONFIG_SPL_CLK=y | ||||
39 | CONFIG_ROCKCHIP_GPIO=y | ||||
40 | CONFIG_SYS_I2C_ROCKCHIP=y | ||||
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 41 | CONFIG_LED=y |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 42 | CONFIG_LED_GPIO=y |
Stephen Warren | 1163625 | 2016-05-12 12:03:35 -0600 | [diff] [blame^] | 43 | CONFIG_SYSRESET=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 44 | CONFIG_DM_MMC=y |
45 | CONFIG_ROCKCHIP_DWMMC=y | ||||
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 46 | CONFIG_PINCTRL=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 47 | CONFIG_SPL_PINCTRL=y |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 48 | # CONFIG_SPL_PINCTRL_FULL is not set |
49 | CONFIG_ROCKCHIP_PINCTRL=y | ||||
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 50 | CONFIG_DM_PMIC=y |
Simon Glass | 889b8a3 | 2016-01-21 19:45:20 -0700 | [diff] [blame] | 51 | # CONFIG_SPL_PMIC_CHILDREN is not set |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 52 | CONFIG_PMIC_ACT8846=y |
53 | CONFIG_DM_REGULATOR=y | ||||
54 | CONFIG_REGULATOR_ACT8846=y | ||||
Simon Glass | 4edb945 | 2016-02-22 22:55:40 -0700 | [diff] [blame] | 55 | CONFIG_DM_REGULATOR_FIXED=y |
Simon Glass | 889b8a3 | 2016-01-21 19:45:20 -0700 | [diff] [blame] | 56 | CONFIG_DM_PWM=y |
57 | CONFIG_PWM_ROCKCHIP=y | ||||
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 58 | CONFIG_RAM=y |
59 | CONFIG_SPL_RAM=y | ||||
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 60 | CONFIG_DEBUG_UART=y |
61 | CONFIG_DEBUG_UART_BASE=0xff690000 | ||||
62 | CONFIG_DEBUG_UART_CLOCK=24000000 | ||||
63 | CONFIG_DEBUG_UART_SHIFT=2 | ||||
Thomas Chou | 9e39003 | 2015-11-19 21:48:14 +0800 | [diff] [blame] | 64 | CONFIG_SYS_NS16550=y |
Simon Glass | 889b8a3 | 2016-01-21 19:45:20 -0700 | [diff] [blame] | 65 | CONFIG_DM_VIDEO=y |
Anatolij Gustschin | 7588c31 | 2016-01-25 17:17:22 +0100 | [diff] [blame] | 66 | CONFIG_DISPLAY=y |
Simon Glass | 889b8a3 | 2016-01-21 19:45:20 -0700 | [diff] [blame] | 67 | CONFIG_VIDEO_ROCKCHIP=y |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 68 | CONFIG_USE_PRIVATE_LIBGCC=y |
Sjoerd Simons | f4a8a17 | 2015-12-04 23:27:41 +0100 | [diff] [blame] | 69 | CONFIG_USE_TINY_PRINTF=y |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 70 | CONFIG_CMD_DHRYSTONE=y |
71 | CONFIG_ERRNO_STR=y |