Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 1 | CONFIG_ARM=y |
| 2 | CONFIG_ARCH_ROCKCHIP=y |
| 3 | CONFIG_SYS_MALLOC_F_LEN=0x2000 |
| 4 | CONFIG_ROCKCHIP_RK3288=y |
| 5 | CONFIG_TARGET_FIREFLY_RK3288=y |
Thomas Chou | e4aa8ed | 2015-11-11 21:39:33 +0800 | [diff] [blame] | 6 | CONFIG_SPL_STACK_R_ADDR=0x80000 |
Sjoerd Simons | 00ea76e | 2015-11-22 08:21:04 +0100 | [diff] [blame] | 7 | CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 8 | CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly" |
| 9 | CONFIG_SPL_STACK_R=y |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 10 | # CONFIG_CMD_IMLS is not set |
| 11 | # CONFIG_CMD_SETEXPR is not set |
| 12 | CONFIG_CMD_PMIC=y |
| 13 | CONFIG_CMD_REGULATOR=y |
| 14 | CONFIG_SPL_OF_CONTROL=y |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 15 | CONFIG_REGMAP=y |
huang lin | 41c7f66 | 2015-11-17 14:20:13 +0800 | [diff] [blame] | 16 | CONFIG_SPL_REGMAP=y |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 17 | CONFIG_SYSCON=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 18 | CONFIG_CLK=y |
| 19 | CONFIG_SPL_CLK=y |
| 20 | CONFIG_ROCKCHIP_GPIO=y |
| 21 | CONFIG_SYS_I2C_ROCKCHIP=y |
huang lin | 41c7f66 | 2015-11-17 14:20:13 +0800 | [diff] [blame] | 22 | CONFIG_SPL_SYSCON=y |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 23 | CONFIG_LED=y |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 24 | CONFIG_LED_GPIO=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 25 | CONFIG_RESET=y |
| 26 | CONFIG_DM_MMC=y |
| 27 | CONFIG_ROCKCHIP_DWMMC=y |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 28 | CONFIG_PINCTRL=y |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 29 | # CONFIG_PINCTRL_FULL is not set |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 30 | CONFIG_SPL_PINCTRL=y |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 31 | # CONFIG_SPL_PINCTRL_FULL is not set |
| 32 | CONFIG_ROCKCHIP_PINCTRL=y |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 33 | CONFIG_DM_PMIC=y |
| 34 | CONFIG_PMIC_ACT8846=y |
| 35 | CONFIG_DM_REGULATOR=y |
| 36 | CONFIG_REGULATOR_ACT8846=y |
| 37 | CONFIG_RAM=y |
| 38 | CONFIG_SPL_RAM=y |
Bin Meng | 80df691 | 2015-09-28 05:14:15 -0700 | [diff] [blame] | 39 | CONFIG_DEBUG_UART=y |
| 40 | CONFIG_DEBUG_UART_BASE=0xff690000 |
| 41 | CONFIG_DEBUG_UART_CLOCK=24000000 |
| 42 | CONFIG_DEBUG_UART_SHIFT=2 |
Thomas Chou | 9e39003 | 2015-11-19 21:48:14 +0800 | [diff] [blame] | 43 | CONFIG_SYS_NS16550=y |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 44 | CONFIG_USE_PRIVATE_LIBGCC=y |
Sjoerd Simons | f4a8a17 | 2015-12-04 23:27:41 +0100 | [diff] [blame^] | 45 | CONFIG_USE_TINY_PRINTF=y |
Simon Glass | 17aa548 | 2015-08-30 16:55:41 -0600 | [diff] [blame] | 46 | CONFIG_CMD_DHRYSTONE=y |
| 47 | CONFIG_ERRNO_STR=y |